DEFEATING DEADLOCKS IN PRODUCTION SOFTWARE
    1.
    发明申请

    公开(公告)号:US20190114248A1

    公开(公告)日:2019-04-18

    申请号:US16159234

    申请日:2018-10-12

    Abstract: The techniques described herein may provide deadlock detection and prevention with improved performance and reduced overhead over existing systems. For example, in an embodiment, a method for improving performance of software code by preventing deadlocks may comprise executing software code in a computer system comprising a processor, memory accessible by the processor, and program instructions and data for the software code stored in the memory, the program instructions executable by the processor to execute the software code, logging information relating to occurrence of deadlock conditions among threads in the executing software code, detecting occurrence of deadlock conditions in the software code based on the logged information, and modifying the software code or data used by the software code so as to prevent occurrence of at least one detected deadlock condition.

    Defeating deadlocks in production software

    公开(公告)号:US10915424B2

    公开(公告)日:2021-02-09

    申请号:US16159234

    申请日:2018-10-12

    Abstract: The techniques described herein may provide deadlock detection and prevention with improved performance and reduced overhead over existing systems. For example, in an embodiment, a method for improving performance of software code by preventing deadlocks may comprise executing software code in a computer system comprising a processor, memory accessible by the processor, and program instructions and data for the software code stored in the memory, the program instructions executable by the processor to execute the software code, logging information relating to occurrence of deadlock conditions among threads in the executing software code, detecting occurrence of deadlock conditions in the software code based on the logged information, and modifying the software code or data used by the software code so as to prevent occurrence of at least one detected deadlock condition.

    Watcher: precise and fully-automatic on-site failure diagnosis

    公开(公告)号:US11599445B2

    公开(公告)日:2023-03-07

    申请号:US16442042

    申请日:2019-06-14

    Abstract: The techniques described herein may provide techniques for precise and fully-automatic on-site software failure diagnosis that overcomes issues of existing systems and general challenges of in-production software failure diagnosis. Embodiments of the present systems and methods may provide a tool capable of automatically pinpointing a fault propagation chain of program failures, with explicit symptoms. The combination of binary analysis, in-situ/identical replay, and debugging registers may be used together to simulate the debugging procedures of a programmer automatically. Overhead, privacy, transparency, convenience, and completeness challenges of in-production failure analysis are improved, making it suitable for deployment uses.

    WATCHER: PRECISE AND FULLY-AUTOMATIC ON-SITE FAILURE DIAGNOSIS

    公开(公告)号:US20190384692A1

    公开(公告)日:2019-12-19

    申请号:US16442042

    申请日:2019-06-14

    Abstract: The techniques described herein may provide techniques for precise and fully-automatic on-site software failure diagnosis that overcomes issues of existing systems and general challenges of in-production software failure diagnosis. Embodiments of the present systems and methods may provide a tool capable of automatically pinpointing a fault propagation chain of program failures, with explicit symptoms. The combination of binary analysis, in-situ/identical replay, and debugging registers may be used together to simulate the debugging procedures of a programmer automatically. Overhead, privacy, transparency, convenience, and completeness challenges of in-production failure analysis are improved, making it suitable for deployment uses.

    FREEGUARD: A FASTER SECURE HEAP ALLOCATOR
    7.
    发明申请

    公开(公告)号:US20190129786A1

    公开(公告)日:2019-05-02

    申请号:US16172294

    申请日:2018-10-26

    Abstract: The techniques described herein may include memory allocation techniques that provide improved security and performance. In embodiments, a method implemented in a computer system may include a processor and a memory, the method may comprise mapping a block of memory, dividing the block of memory into a plurality of heaps, dividing each heap into a plurality of sub-heaps, wherein each sub-heap is associated with one thread of software executing in the computer system, dividing each sub-heap into a plurality of bags, wherein each bag is associated with one size class of objects, and storing a plurality of objects in at least some of the bags, wherein each object is stored in a bag having size class corresponding to a size of the object.

    Guarder: an efficient heap allocator with strongest and tunable security

    公开(公告)号:US11593483B2

    公开(公告)日:2023-02-28

    申请号:US16656853

    申请日:2019-10-18

    Abstract: Memory allocation techniques may provide improved security and performance. A method may comprise mapping a block of memory, dividing the block of memory into a plurality of heaps, dividing each heap into a plurality of sub-heaps, wherein each sub-heap is associated with one thread of software executing in the computer system, dividing each sub-heap into a plurality of bags, wherein each bag is associated with one size class of objects, creating an allocation buffer and a deallocation buffer for each bag, storing a plurality of objects in at least some of the bags, wherein each object is stored in a bag having size class corresponding to a size of the object, storing in the allocation buffer of each bag information relating to available objects stored in that bag, and storing in the deallocation buffer of each bag information relating to freed objects that were stored in that bag.

    Freeguard: a faster secure heap allocator

    公开(公告)号:US10901828B2

    公开(公告)日:2021-01-26

    申请号:US16172294

    申请日:2018-10-26

    Abstract: The techniques described herein may include memory allocation techniques that provide improved security and performance. In embodiments, a method implemented in a computer system may include a processor and a memory, the method may comprise mapping a block of memory, dividing the block of memory into a plurality of heaps, dividing each heap into a plurality of sub-heaps, wherein each sub-heap is associated with one thread of software executing in the computer system, dividing each sub-heap into a plurality of bags, wherein each bag is associated with one size class of objects, and storing a plurality of objects in at least some of the bags, wherein each object is stored in a bag having size class corresponding to a size of the object.

Patent Agency Ranking