公开(公告)号：US5995426A

公开(公告)日：1999-11-30

申请号：US964429

申请日：1997-11-04

申请人： Timothy B. Cowles ,  Jeffery P. Wright

发明人： Timothy B. Cowles ,  Jeffery P. Wright

IPC分类号： G11C29/50 ,  G11C7/00

CPC分类号： G11C29/50012 ,  G11C29/50 ,  G11C11/401

摘要： A method for testing an electronic device includes causing the device to perform an operation. Using circuitry of the device, a duration of time is asynchronously measured in association with the step of causing. The operation is controlled in response to the expiration of the duration.

公开(公告)号：US06526533B1

公开(公告)日：2003-02-25

申请号：US09656586

申请日：2000-09-06

申请人： Timothy B. Cowles ,  Jeffery P. Wright

发明人： Timothy B. Cowles ,  Jeffery P. Wright

IPC分类号： G11C2900

CPC分类号： G01R31/318505

摘要： Systems, methods and apparatus for accessing integrated circuits, such as semiconductor memories and particularly in testing, by reducing the number of clock cycles required to apply sequences of command and address signals to a m-dimensional structure of such integrated circuit, such as a memory array. The system, methods and apparatus comprise structure and steps by which commands are issued responsive to external controls signals and commands are generated independent of such signals, such commands being communicated internal to the integrated circuit via separate data paths.

摘要翻译： 通过减少将命令和地址信号序列应用到诸如存储器的集成电路的m维结构所需的时钟周期的数量来访问诸如半导体存储器，特别是在测试中的集成电路的系统，方法和装置 数组。 系统，方法和装置包括响应外部控制信号发出命令的结构和步骤，独立于这种信号产生命令，这些命令通过单独的数据路径在集成电路内部传送。

公开(公告)号：US06253340B1

公开(公告)日：2001-06-26

申请号：US09093967

申请日：1998-06-08

申请人： Timothy B. Cowles ,  Jeffery P. Wright

发明人： Timothy B. Cowles ,  Jeffery P. Wright

IPC分类号： G11C2900

CPC分类号： G01R31/318505

摘要： Systems, methods and apparatus for accessing integrated circuits, such as semiconductor memories and particularly in testing, by reducing the number of clock cycles required to apply sequences of command and address signals to a m-dimensional structure of such integrated circuit, such as a memory array. The system, methods and apparatus comprise structure and steps by which commands are issued responsive to external controls signals and commands are generated independent of such signals, such commands being communicated internal to the integrated circuit via separate data paths.

摘要翻译： 通过减少将命令和地址信号序列应用到诸如存储器的集成电路的m维结构所需的时钟周期的数量来访问诸如半导体存储器，特别是在测试中的集成电路的系统，方法和装置 数组。 系统，方法和装置包括响应外部控制信号发出命令的结构和步骤，独立于这种信号产生命令，这些命令通过单独的数据路径在集成电路内部传送。