公开(公告)号：US06611909B1

公开(公告)日：2003-08-26

申请号：US09201855

申请日：1998-12-01

申请人： Tobias Roos ,  Dan Halvarsson ,  Tomas Jonsson

发明人： Tobias Roos ,  Dan Halvarsson ,  Tomas Jonsson

IPC分类号： G06F922

CPC分类号： G06F9/30181 ,  G06F9/261 ,  G06F9/30145 ,  G06F9/30189 ,  G06F9/30196 ,  G06F11/3024 ,  G06F11/3055 ,  G06F11/3466

摘要： In a computer system the instruction decoding unit for translating program instructions to microcode instructions operates dynamically. Thus the unit receives state signals indicating the state of the computer, such as a trace enabling signal, influencing the translation process in the instruction decoding unit. These state signals are added to the operation code of the program instruction to be decoded, the operation code of the program instruction thus being extended and used as input to a translating table, the extended operation code of the program instruction being taken as an address of a field in the table. The addresses and thus the contents of the fields addressed for the same operation code of a program instruction can then be different for different values of the state signals. Thus generally, the state signals cause the instruction decoder to change its translating algorithm so that the decoder can decode an operation code differently depending on the state which the signals adopt. The dynamic decoding can for a trace enabling signal be used for switching on and off a trace function. In the normal case, when tracing is not desired, no microinstructions supporting the trace function have to executed and thereby the performance and in particular the speed of the computer system will be increased.

摘要翻译： 在计算机系统中，用于将程序指令转换为微代码指令的指令解码单元动态地进行操作。 因此，单元接收指示计算机的状态的状态信号，例如跟踪使能信号，影响指令解码单元中的转换处理。 这些状态信号被添加到要解码的程序指令的操作代码中，因此程序指令的操作代码被扩展并用作转换表的输入，程序指令的扩展操作代码被视为 表中的一个字段。 因此，对于不同的状态信号值，对于程序指令的相同操作代码寻址的字段的地址和因此的内容可以是不同的。 因此，通常情况下，状态信号使指令译码器改变其翻译算法，使得解码器可根据信号采用的状态对不同的操作码进行解码。 动态解码可以用于跟踪启用信号用于打开和关闭跟踪功能。 在正常情况下，当不期望跟踪时，不需要执行支持跟踪功能的微指令，从而提高计算机系统的性能，特别是速度。

公开(公告)号：US06499100B1

公开(公告)日：2002-12-24

申请号：US09580499

申请日：2000-05-30

申请人： Dan Halvarsson ,  Tomas Jonsson ,  Per Holmberg

发明人： Dan Halvarsson ,  Tomas Jonsson ,  Per Holmberg

IPC分类号： G06F930

CPC分类号： G06F9/382 ,  G06F9/3802

摘要： When decoding instructions of a program to be executed in a central processing unit comprising pipelining facilities for fast instruction decoding, part of the decoding is executed or the decoding in pipelining units is prepared in a remapping unit during loading a program into a program or primary memory used by the central processor, the remapping or predecoding operation resulting in operation codes which can be very rapidly interpreted by the pipelining units of the central processor. Thus, the operation code field of an instruction is changed to include information on e.g., instruction length, jumps, parameters, etc., this information indicating the instruction length, whether it is a jump instruction or has a parameter etc. respectively, in a direct way that allows the use of simple combinatorial circuits in the pipelining units. This makes it possible to obtain a decoding of complex instructions using few clock cycles, and also that old type instructions can be used as input to the system without degrading the time performance of the instruction decoding. Also, accesses of the program memory and a data memory can be made earlier during execution of a program, which saves execution time.

摘要翻译： 当在包括用于快速指令解码的流水线设备的中央处理单元中执行的程序的指令解码时，执行部分解码，或者在将程序加载到程序或主存储器中时，在重新映射单元中准备解码 由中央处理器使用，重新映射或预解码操作导致可以由中央处理器的流水线单元非常快速地解释的操作代码。 因此，指令的操作代码字段被改变为包括关于例如指令长度，跳转，参数等的信息，分别指示指令长度的该信息，无论是跳转指令还是具有参数等 直接方式允许在流水线单元中使用简单的组合电路。 这使得可以使用几个时钟周期来获得复杂指令的解码，并且也可以将老式指令用作系统的输入，而不会降低指令解码的时间性能。 此外，程序存储器和数据存储器的访问可以在执行程序期间更早地进行，这节省了执行时间。

公开(公告)号：US06330664B1

公开(公告)日：2001-12-11

申请号：US09185194

申请日：1998-11-03

申请人： Dan Halvarsson

发明人： Dan Halvarsson

IPC分类号： G06F930

CPC分类号： G06F9/3806 ,  G06F9/30058

摘要： An arrangement and a method provide instruction processing. Instructions are delivered to a multi-stage pipeline arrangement from at least one instruction source. A storing arrangement stores jump address information for jump instructions. The storing arrangement includes at least one FIFO-register. The conditional jump target address information is stored in the FIFO-register while at least the jump instructions are stored in the pipeline arrangement. The jump target address information is delivered from the FIFO-register in such a way that substantially sequential and continuous prefetching of the instructions is enabled irrespective of the number of conditional jumps and irrespective of whether the jumps are taken or not.

摘要翻译： 一种安排和方法提供指令处理。 从至少一个指令源将指令传送到多级流水线装置。 存储装置存储用于跳转指令的跳转地址信息。 存储装置包括至少一个FIFO寄存器。 条件跳转目标地址信息存储在FIFO寄存器中，而至少跳转指令存储在流水线配置中。 跳跃目标地址信息从FIFO寄存器传送，使得指令的基本上连续和连续的预取被使能，而与条件跳转的数量无关，并且不管是否采用跳转。