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公开(公告)号:US06519184B2
公开(公告)日:2003-02-11
申请号:US10082335
申请日:2002-02-26
申请人: Toshihiro Tanaka , Hiroyuki Tanikawa , Masayoshi Nakano , Norio Oza , Koki Watanabe , Yutaka Shinagawa
发明人: Toshihiro Tanaka , Hiroyuki Tanikawa , Masayoshi Nakano , Norio Oza , Koki Watanabe , Yutaka Shinagawa
IPC分类号: G11C1606
CPC分类号: G11C16/344 , G11C16/3468
摘要: In a verify operation after a write or erase to check whether a memory cell threshold voltage is contained in a predetermined threshold voltage distribution, verify voltage is changed in three stages or more in a direction to mitigate the decision condition. This prevents non-convergence of write and erase operation and can complete the write or erase in a short time.