公开(公告)号：US20160254093A1

公开(公告)日：2016-09-01

申请号：US14633616

申请日：2015-02-27

Applicant: U.S. Army Research Laboratory ATTN: RDRL-LOC-I

Inventor： Daniel M. Baechle ,  Daniel J. O'Brien ,  Eric D. Wetzel ,  Oleg B. Yurchak

IPC: H01G4/30 ,  H01G4/232 ,  H01G4/008 ,  H01G4/005 ,  H01G4/16 ,  H01G4/18

CPC classification number: H01G4/30 ,  H01G4/16 ,  H01G4/18 ,  H01G4/203 ,  H01G4/232

Abstract: A structural capacitor having a plurality of planar dielectric layers and a plurality of positive and negative electrodes with the positive and negative electrodes alternating between each dielectric layer. First and second spaced apart holes are provided through each dielectric layer as well as the electrodes so that the first holes in the electrodes register with the first holes in the dielectric layer and likewise for the second holes. The capacitor is formed by stacking the dielectric layers and electrodes on two spaced apart alignment pins with a positive alignment pin extending through the first holes and a negative alignment pin extending through the second holes in the dielectric layers and electrodes. These alignment pins maintain layer alignment during subsequent thermal and pressure processing to bond together the dielectric and electrode layers into an integral structural material. After processing, the alignment pins are removed and replaced with electrode pins, where the positive electrode pin is in electrical contact only with the positive electrodes and the negative electrode pin is in electrical contact only with the negative electrodes. The electrode pins are used for subsequent electrical and mechanical connectorization to the structural capacitor.

Abstract translation: 具有多个平面介质层和多个正极和负极的结构电容器，其中正极和负极在每个电介质层之间交替。 通过每个电介质层以及电极提供第一和第二间隔开的孔，使得电极中的第一孔与电介质层中的第一孔对准，同样用于第二孔。 电容器通过将介电层和电极堆叠在两个间隔开的对准销上并通过延伸穿过第一孔的正对准销和延伸穿过介电层和电极中的第二孔的负对准销来形成。 这些对准销在随后的热和压力处理期间保持层对准，以将电介质层和电极层结合在一体的结构材料中。 在处理之后，对准引脚被移除并且被电极引脚替代，其中正电极引脚只与正极电接触，而负电极引脚仅与负极电接触。 电极引脚用于随后的电气和机械连接到结构电容器。

公开(公告)号：US09959974B2

公开(公告)日：2018-05-01

申请号：US14633616

申请日：2015-02-27

Applicant: U.S. Army Research Laboratory ATTN: RDRL-LOC-I

Inventor： Daniel M. Baechle ,  Daniel J. O'Brien ,  Eric D. Wetzel ,  Oleg B. Yurchak

IPC: H01G7/00 ,  H01G4/30 ,  H01G4/16 ,  H01G4/18 ,  H01G4/232 ,  H01G4/20

CPC classification number: H01G4/30 ,  H01G4/16 ,  H01G4/18 ,  H01G4/203 ,  H01G4/232

Abstract: A structural capacitor having a plurality of planar dielectric layers and a plurality of positive and negative electrodes with the positive and negative electrodes alternating between each dielectric layer and methods for making structural capacitors are provided. First and second spaced apart holes are provided through each dielectric layer as well as the electrodes so that the first holes in the electrodes register with the first holes in the dielectric layer and likewise for the second holes. The capacitor is formed by stacking the dielectric layers and electrodes on two spaced apart alignment pins with a positive alignment pin extending through the first holes and a negative alignment pin extending through the second holes in the dielectric layers and electrodes. These alignment pins maintain layer alignment during subsequent thermal and pressure processing to bond together the dielectric and electrode layers into an integral structural material. After processing, the alignment pins are removed and replaced with electrode pins, where the positive electrode pin is in electrical contact only with the positive electrodes and the negative electrode pin is in electrical contact only with the negative electrodes. The electrode pins are used for subsequent electrical and mechanical connectorization to the structural capacitor.