公开(公告)号：US20010050728A1

公开(公告)日：2001-12-13

申请号：US09861941

申请日：2001-05-21

Applicant: U.S. PHILIPS CORPORATION.

Inventor： Martin J. Edwards

IPC: G02F001/133 ,  G09G003/36

CPC classification number: G11C8/14 ,  G09G3/32 ,  G09G3/3648 ,  G09G3/3688 ,  G09G2300/0408 ,  G09G2300/08 ,  G09G2310/027 ,  G09G2310/0297 ,  G09G2320/02 ,  G09G2320/0223

Abstract: An active matrix array device, such as an AMLCD, has an array of matrix elements (10) addressed via sets of address conductors (14, 16). An address circuit (35) connected to one set (16) includes a multiplexing circuit (31) integrated on the same substrate (25) as the matrix elements and the address conductors of the one set are organised in groups with each conductor in a group being associated with a respective and different one of a plurality of signal bus lines (33) in the multiplexer circuit. Each signal bus line (33) is connected to a respective signal processing circuit (42), e.g. a DAC in the case of an AMLCD, also integrated on the substrate as respective circuit blocks. To avoid problems in use, for example caused by variations in the performance of these signal processing circuits, the arrangement of couplings with the bus lines of the address conductors in adjacent groups is mirrored about the boundary between the groups.

Abstract translation: 诸如AMLCD的有源矩阵阵列装置具有通过地址导体集合（14,16）寻址的矩阵元素阵列（10）。 连接到一组（16）的地址电路（35）包括集成在与矩阵元件相同的基板（25）上的多路复用电路（31），并且一组的地址导体与组中的每个导体分组地组织 与多路复用器电路中的多个信号总线（33）中的相应且不同的一个相关联。 每个信号总线（33）连接到相应的信号处理电路（42），例如 在AMLCD的情况下，DAC也作为各个电路块集成在衬底上。 为了避免使用中的问题，例如由这些信号处理电路的性能的变化引起的，与相邻组中的地址导体的总线的耦合的布置与组之间的边界相反。