公开(公告)号：US10475925B2

公开(公告)日：2019-11-12

申请号：US15985683

申请日：2018-05-21

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Wei-Lun Hsu ,  Hsin-Che Huang ,  Shyan-Liang Chou ,  Hung-Lin Shih

IPC: H01L21/762 ,  H01L29/78 ,  H01L27/092 ,  H01L29/06 ,  H01L21/8238

Abstract: A method for forming a complementary metal oxide semiconductor device is disclosed. First, a substrate having a first device region and a second device region is provided. A first trench is formed in the first device region and filled with a first material. A second trench is formed in the second device region and filled with a second material. The first material and the second material comprise different stresses. After that, a first gate structure and a second gate structure are formed on the first material and the second material and completely covering the first trench and the second trench, respectively.

公开(公告)号：US10008599B1

公开(公告)日：2018-06-26

申请号：US15446009

申请日：2017-03-01

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Wei-Lun Hsu ,  Hsin-Che Huang ,  Shyan-Liang Chou ,  Hung-Lin Shih

IPC: H01L29/78 ,  H01L27/092 ,  H01L29/06 ,  H01L21/8238 ,  H01L21/762 ,  H01L21/02

CPC classification number: H01L29/7846 ,  H01L21/76224 ,  H01L21/823807 ,  H01L21/823878 ,  H01L27/092 ,  H01L27/0924 ,  H01L29/0649

Abstract: A complementary metal oxide semiconductor (CMOS) device is disclosed. The CMOS device includes a substrate with a first device region and a second device region formed thereon. A first isolation structure is formed in the first device region, and includes a first trench filled with a first material. A second isolation structure is formed in the second device region and includes a second trench filled with a second material. The first material and the second material have different stresses. A first gate structure is disposed atop the first material and completely covering the first trench. A second gate structure is disposed atop the second material and completely covering the second trench.

公开(公告)号：US20180277679A1

公开(公告)日：2018-09-27

申请号：US15985683

申请日：2018-05-21

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Wei-Lun Hsu ,  Hsin-Che Huang ,  Shyan-Liang Chou ,  Hung-Lin Shih

IPC: H01L29/78 ,  H01L21/8238 ,  H01L21/02 ,  H01L29/06 ,  H01L27/092 ,  H01L21/762

CPC classification number: H01L29/7846 ,  H01L21/76224 ,  H01L21/823807 ,  H01L21/823878 ,  H01L27/092 ,  H01L27/0924 ,  H01L29/0649

Abstract: A method for forming a complementary metal oxide semiconductor device is disclosed. First, a substrate having a first device region and a second device region is provided. A first trench is formed in the first device region and filled with a first material. A second trench is formed in the second device region and filled with a second material. The first material and the second material comprise different stresses. After that, a first gate structure and a second gate structure are formed on the first material and the second material and completely covering the first trench and the second trench, respectively.