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公开(公告)号:US10818356B2
公开(公告)日:2020-10-27
申请号:US16263604
申请日:2019-01-31
发明人: Satoshi Torii , Shu Ishihara
IPC分类号: G11C16/04 , H01L27/11529 , H01L27/11524 , G11C16/26
摘要: A nonvolatile semiconductor memory device includes a selection transistor and a memory transistor that are formed on a well for each of a plurality of memory cells. At a time of a data read from the memory transistor, a first voltage is applied to the well and a source of the memory transistor, and a second voltage is applied to a gate of the selection transistor included in a non-selected memory cell among the plurality of memory cells. The first voltage is smaller than an absolute value of the second voltage.