公开(公告)号：US11994536B2

公开(公告)日：2024-05-28

申请号：US17515987

申请日：2021-11-01

申请人： UNIVERSITY OF ELECTRONIC SCIENCE AND TECHNOLOGY OF CHINA

发明人： Bo Xu ,  Kai Chen ,  Libing Bai ,  Lulu Tian ,  Hang Geng ,  Yuhua Cheng ,  Songting Zou ,  Jia Zhao ,  Yanjun Yan ,  Xiaoyu Huang

IPC分类号： G01R13/40 ,  G01R13/02

CPC分类号： G01R13/403 ,  G01R13/02 ,  G01R13/0209

摘要： The present invention provides a system for data mapping and storing in digital three-dimensional oscilloscope, wherein the fixed coefficients, which are calculated according the parameters and settings of a digital oscilloscope, are stored into a fixed coefficient memory CO RAM, the fixed coefficients are outputted to N fractional operation units through N−1 D flip-flop delay units to multiply with the acquired data x(n) and then be accumulated, thus N fractional calculus results are obtained. In this way, N fractional calculus results can be obtained by performing L/N fractional calculus operations. N fractional calculus results are sent to a signal processing and display module, in which they are converted into a display data through a drawing thread, and the display data are sent to LCD for displaying, thus the fractional calculus operation and display of a input signal in a digital oscilloscope is realized.

公开(公告)号：US11486901B2

公开(公告)日：2022-11-01

申请号：US17220160

申请日：2021-04-01

申请人： UNIVERSITY OF ELECTRONIC SCIENCE AND TECHNOLOGY OF CHINA

发明人： Yuhua Cheng ,  Bo Xu ,  Kai Chen ,  Songting Zou ,  Libing Bai ,  Hang Geng ,  Yanjun Yan ,  Jia Zhao

IPC分类号： G01R13/02

摘要： A system maps and stores data in digital three-dimensional oscilloscope, wherein an ADC module has four ADC submodules. Four acquired waveform data are sent to an extraction module, and buffered in a FIFO module. When a trigger signal arrives, FIFO module outputs four extracted waveform data to a mapping address calculation module for calculating a mapping address and a RAM serial number for each point data, and the waveform data comparison and control module performs the reading and writing control of the 4×N dual port RAMs. When mapping number reaches a frame number, the RAM array module outputs its waveform probability values to the upper computer module to convert each value into RBG values, and the display module displays the waveforms of input signals of four channels on a screen according the RBG values.