公开(公告)号：US3593168A

公开(公告)日：1971-07-13

申请号：US3593168D

申请日：1966-08-31

申请人： US NAVY

发明人： ORTON CRILEY

IPC分类号： G01S13/68 ,  H03G3/30 ,  H03K5/08

CPC分类号： G01S13/68 ,  H03G3/3036

摘要： A circuit for normalizing over a wide video input range, the first pulse of a chain of pulses whose relative amplitude ratios contain information. The video input pulses are applied to a resistance divider and the output is taken from a junction within the divider. The second, or lower resistor resistance value is changed in inverse ratio to the amplitude of the first video pulse so that the output amplitude of the first pulse remains constant.