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公开(公告)号:US11271569B2
公开(公告)日:2022-03-08
申请号:US17136887
申请日:2020-12-29
发明人: Beomsoo Park , Nima Maghari
IPC分类号: H03K19/20 , H03K19/0944
摘要: The present disclosure describes systems, apparatuses, and methods for implementing a logic gate circuit structure for operating one or more Boolean functions. Instead of stacking transistors in series to accommodate an increased number of inputs, a parallel configuration is presented that significantly reduces the cascaded number of transistors and the total number of transistors for the same functionality.