公开(公告)号：US20140129818A1

公开(公告)日：2014-05-08

申请号：US14017378

申请日：2013-09-04

Applicant: VIA TECHNOLOGIES, INC.

Inventor： Kai LI ,  Jiangbo WANG ,  Wei YIN

IPC: G06F9/44

CPC classification number: G06F9/4403 ,  G06F1/24 ,  G06F21/572 ,  G06F21/575 ,  G06F21/79

Abstract: The present invention provides an electronic device including a write-once-then-read-only register, a chipset, a read-only memory, a flash memory and a central processor. The write-once-then-read-only register is arranged to store a determination value. The chipset is arranged to produce a CPU reset signal. The read-only memory is implemented in the chipset, and has a first memory block which corresponds to a predetermined address and is used to store a first instruction. The flash memory is coupled to the chipset, and has a second memory block which corresponds to the predetermined address and is used to store a second instruction. The central processor is arranged to determine the location of the predetermined address according to the CPU reset signal and the determination value.

Abstract translation: 本发明提供一种电子设备，其包括一次写入只读寄存器，芯片组，只读存储器，闪存和中央处理器。 一次写入只读寄存器被布置成存储确定值。 芯片组被布置成产生CPU复位信号。 只读存储器在芯片组中实现，并且具有对应于预定地址并用于存储第一指令的第一存储器块。 闪存耦合到芯片组，并且具有对应于预定地址的第二存储器块，并用于存储第二指令。 中央处理器被配置为根据CPU复位信号和确定值确定预定地址的位置。