公开(公告)号：US09575816B2

公开(公告)日：2017-02-21

申请号：US13758924

申请日：2013-02-04

Applicant: VIA Technologies, Inc.

Inventor： Rodney E. Hooker ,  Douglas R. Reed

IPC: G06F9/52 ,  G06F9/38 ,  G06F11/07

CPC classification number: G06F9/526 ,  G06F9/38 ,  G06F9/3836 ,  G06F11/0721 ,  G06F11/0751 ,  G06F11/0793

Abstract: A microprocessor includes a main processor and a service processor. The service processor is configured to detect and break a deadlock/livelock condition in the main processor. The service processor detects the deadlock/livelock condition by detecting the main processor has not retired an instruction or completed a processor bus transaction for a predetermined number of clock cycles. In response to detecting the deadlock/livelock condition in the main processor, the service processor causes arbitration requests to a cache memory to be captured in a buffer, analyzes the captured requests to detect a pattern that may indicate a bug causing the condition and performs actions associated with the pattern to break the deadlock/livelock. The actions include suppression of arbitration requests to the cache, suppression of comparisons cache request addresses and killing requests to access the cache.

Abstract translation: 微处理器包括主处理器和服务处理器。 服务处理器被配置为检测并破坏主处理器中的死锁/活动锁定状态。 服务处理器通过检测主处理器未停止指令或完成处理器总线事务达预定数量的时钟周期来检测死锁/活动锁定状况。 响应于检测到主处理器中的死锁/活动锁定状况，服务处理器将向高速缓冲存储器发出仲裁请求以在缓冲器中被捕获，分析所捕获的请求以检测可能指示导致条件的错误并执行动作的模式 与模式相关联以打破僵局/活锁。 这些操作包括抑制对缓存的仲裁请求，抑制比较缓存请求地址和杀死访问高速缓存的请求。