Resilient Antenna Securing Mechanism

    公开(公告)号:US20220359974A1

    公开(公告)日:2022-11-10

    申请号:US17872095

    申请日:2022-07-25

    申请人: VEEA INC.

    IPC分类号: H01Q1/20 H01Q1/38 H01Q1/12

    摘要: A resilient antenna securing device that includes a frame structure and a plurality of fin components projecting outwardly from the frame structure. The fin components are configured to receive and hold one or more RF antenna portions. Each fin of a first pair of the plurality of fins components includes a tab that extends toward the other fin of the first pair of fins. At least one first intermediate fin of the plurality of fins is disposed between the first pair of fins. The tabs from the first pair of fins together trap a first RF antenna portion between the tabs and the at least one first intermediate fin.

    Module Identification Method for Expandable Gateway Applications

    公开(公告)号:US20220141324A1

    公开(公告)日:2022-05-05

    申请号:US17577642

    申请日:2022-01-18

    申请人: Veea Inc.

    IPC分类号: H04M1/02

    摘要: A modular wireless communications system (edge device, etc.) that includes a base unit having a base unit processor and one or more additional units that each include a processor, in which the base unit processor is configured with processor-executable software instructions to determine whether the base unit has been combined with the one or more additional units to create a combined unit and/or whether one or more of the additional units have been detached from the combined unit. The processor may automatically perform an edge reconfiguration interrogation and enumeration (ERIE) operation in response to determining that the base unit has been combined with the one or more additional units to create the combined unit or in response to determining that one or more of the additional units have been detached from the combined unit.

    Method and Procedure for Miniaturing a Multi-layer PCB

    公开(公告)号:US20210352802A1

    公开(公告)日:2021-11-11

    申请号:US17313073

    申请日:2021-05-06

    申请人: Veea Inc.

    IPC分类号: H05K1/02

    摘要: A multiple layer printed circuit board (PCB) in which the cores (or core layers) are removed and replaced with prepreg layers, which provide structure integrity for the PCB. Such a multi-layer PCB may include a plurality of layers that include a plurality of signal layers, a plurality of ground plane layers, a plurality of inner signal layers, and a single core substrate layer. Each layer in the plurality of layers may be separated from every other layer in the plurality of layers by at least one prepreg substrate layer.

    Method and Procedure for Miniaturing a Multi-layer PCB

    公开(公告)号:US20230017840A1

    公开(公告)日:2023-01-19

    申请号:US17946450

    申请日:2022-09-16

    申请人: Veea Inc.

    IPC分类号: H05K1/02

    摘要: A multiple layer printed circuit board (PCB) in which the cores (or core layers) are removed and replaced with prepreg layers, which provide structure integrity for the PCB. Such a multi-layer PCB may include signal layers, ground plane layers, inner signal layers, and a single core substrate layer. Each of the layers may be separated from the other layers by at least one prepreg substrate layer.