公开(公告)号：US20110194367A1

公开(公告)日：2011-08-11

申请号：US12702037

申请日：2010-02-08

申请人： Victor Wong ,  William F. Jones ,  Seth A. Eichmeyer

发明人： Victor Wong ,  William F. Jones ,  Seth A. Eichmeyer

IPC分类号： G11C29/00 ,  G11C7/00

CPC分类号： G11C11/406 ,  G11C7/02 ,  G11C11/40618 ,  G11C11/40622 ,  G11C29/783

摘要： Memories, systems, and methods for refreshing are provided, such as a memory with an array of memory cells divided into sections. Memories include replacement elements having a digit line, and detecting circuitry coupled to the digit line of at least one section of the memory cell array and coupled to the digit line of the replacement element. Memories include control logic configured to selectively refresh the replacement element at an occurrence when a non-neighboring section of the memory cell array relative to the replacement element is refreshed. Other memories, systems, and methods are provided.

摘要翻译： 提供了用于刷新的存储器，系统和方法，例如具有划分为部分的存储器单元阵列的存储器。 存储器包括具有数字线的替换元件，以及耦合到存储单元阵列的至少一个部分的数字线的耦合到替换元件的数字线的检测电路。 存储器包括控制逻辑，其被配置为当相对于替换元件的存储器单元阵列的非相邻部分被刷新时，在出现时有选择地刷新替换元件。 提供其他记忆，系统和方法。

公开(公告)号：US08208334B2

公开(公告)日：2012-06-26

申请号：US12702037

申请日：2010-02-08

申请人： Victor Wong ,  William F. Jones ,  Seth A. Eichmeyer

发明人： Victor Wong ,  William F. Jones ,  Seth A. Eichmeyer

IPC分类号： G11C7/00

CPC分类号： G11C11/406 ,  G11C7/02 ,  G11C11/40618 ,  G11C11/40622 ,  G11C29/783

摘要： Memories, systems, and methods for refreshing are provided, such as a memory with an array of memory cells divided into sections. Memories include replacement elements having a digit line, and detecting circuitry coupled to a digit line of at least one section of the memory cell array and coupled to the digit line of the replacement element. Memories include control logic configured to selectively refresh the replacement element at an occurrence when a non-neighboring section of the memory cell array relative to the replacement element is refreshed. Other memories, systems, and methods are provided.

摘要翻译： 提供了用于刷新的存储器，系统和方法，例如具有划分为部分的存储器单元阵列的存储器。 存储器包括具有数字线的替换元件，以及耦合到存储器单元阵列的至少一个部分的数字线并耦合到替换元件的数字线的检测电路。 存储器包括控制逻辑，其被配置为当相对于替换元件的存储器单元阵列的非相邻部分被刷新时，在出现时有选择地刷新替换元件。 提供其他记忆，系统和方法。

公开(公告)号：US08942054B2

公开(公告)日：2015-01-27

申请号：US13532301

申请日：2012-06-25

申请人： Victor Wong ,  William F. Jones ,  Seth A. Eichmeyer

发明人： Victor Wong ,  William F. Jones ,  Seth A. Eichmeyer

IPC分类号： G11C7/00 ,  G11C11/406 ,  G11C29/00 ,  G11C7/02

CPC分类号： G11C11/406 ,  G11C7/02 ,  G11C11/40618 ,  G11C11/40622 ,  G11C29/783

摘要： Memories, systems, and methods for refreshing are provided, such as a memory with an array of memory cells divided into sections. Memories include replacement elements having a digit line, and detecting circuitry coupled to a digit line of at least one section of the memory cell array and coupled to the digit line of the replacement element. Memories include control logic configured to selectively refresh the replacement element at an occurrence when a non-neighboring section of the memory cell array relative to the replacement element is refreshed. Other memories, systems, and methods are provided.

摘要翻译： 提供了用于刷新的存储器，系统和方法，例如具有划分为部分的存储器单元阵列的存储器。 存储器包括具有数字线的替换元件，以及耦合到存储器单元阵列的至少一个部分的数字线并耦合到替换元件的数字线的检测电路。 存储器包括控制逻辑，其被配置为当相对于替换元件的存储器单元阵列的非相邻部分被刷新时，在出现时有选择地刷新替换元件。 提供其他记忆，系统和方法。

公开(公告)号：US20120263001A1

公开(公告)日：2012-10-18

申请号：US13532301

申请日：2012-06-25

申请人： Victor Wong ,  William F. Jones ,  Seth A. Eichmeyer

发明人： Victor Wong ,  William F. Jones ,  Seth A. Eichmeyer

IPC分类号： G11C11/402 ,  G11C29/00

CPC分类号： G11C11/406 ,  G11C7/02 ,  G11C11/40618 ,  G11C11/40622 ,  G11C29/783

摘要： Memories, systems, and methods for refreshing are provided, such as a memory with an array of memory cells divided into sections. Memories include replacement elements having a digit line, and detecting circuitry coupled to a digit line of at least one section of the memory cell array and coupled to the digit line of the replacement element. Memories include control logic configured to selectively refresh the replacement element at an occurrence when a non-neighboring section of the memory cell array relative to the replacement element is refreshed. Other memories, systems, and methods are provided.

摘要翻译： 提供了用于刷新的存储器，系统和方法，例如具有划分为部分的存储器单元阵列的存储器。 存储器包括具有数字线的替换元件，以及耦合到存储器单元阵列的至少一个部分的数字线并耦合到替换元件的数字线的检测电路。 存储器包括控制逻辑，其被配置为当相对于替换元件的存储器单元阵列的非相邻部分被刷新时，在出现时有选择地刷新替换元件。 提供其他记忆，系统和方法。