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公开(公告)号：US20080301362A1
公开(公告)日：2008-12-04
申请号：US11810072
申请日：2007-06-04
摘要： Systems, devices, and methods, including executable instructions are provided for resolving content addressable memory (CAM) match address priority. One method includes retaining a first match address as the best match address. Subsequent match addresses are compared to the retained best match address, each match address being associated with a compare cycle during which a selected columnar portion of each CAM entry is compared to a corresponding portion of a search term. The best match address is updated as a result of the comparison.
摘要翻译： 提供系统，设备和方法，包括可执行指令，用于解析内容可寻址存储器（CAM）匹配地址优先级。 一种方法包括保留第一匹配地址作为最佳匹配地址。 将后续匹配地址与保留的最佳匹配地址进行比较，每个匹配地址与比较周期相关联，在该比较周期期间，将每个CAM条目的选定柱状部分与搜索项的相应部分进行比较。 作为比较的结果，最佳匹配地址被更新。
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公开(公告)号：US07760530B2
公开(公告)日：2010-07-20
申请号：US11810072
申请日：2007-06-04
IPC分类号： G11C15/00
摘要： Systems, devices, and methods, including executable instructions are provided for resolving content addressable memory (CAM) match address priority. One method includes retaining a first match address as the best match address. Subsequent match addresses are compared to the retained best match address, each match address being associated with a compare cycle during which a selected columnar portion of each CAM entry is compared to a corresponding portion of a search term. The best match address is updated as a result of the comparison.
摘要翻译： 提供系统，设备和方法，包括可执行指令，用于解析内容可寻址存储器（CAM）匹配地址优先级。 一种方法包括保留第一匹配地址作为最佳匹配地址。 将后续匹配地址与保留的最佳匹配地址进行比较，每个匹配地址与比较周期相关联，在该比较周期期间，将每个CAM条目的选定柱状部分与搜索项的相应部分进行比较。 作为比较的结果，最佳匹配地址被更新。
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公开(公告)号：US20140211609A1
公开(公告)日：2014-07-31
申请号：US14239837
申请日：2011-09-28
IPC分类号： H04L12/24 , H04L12/707
CPC分类号： H04L41/0663 , H04L12/1881 , H04L45/22 , H04L49/101 , H04L49/109 , H04L49/25
摘要： In a method for implementing a switch fabric, in a first fabric chip, a packet comprising an identification of a destination node chip is received from a source fabric chip, and a determination that a first path in the switch fabric along which the packet is to be communicated toward the destination node chip is unavailable is made. In addition, a determination as to whether another path along which the packet is to be communicated toward the destination node chip that does not include the source fabric chip is available is made. In response to a determination that the another path is available, the packet is communicated along the another path. In addition, in response to a determination that the another path is unavailable, the packet is communicated back to the source fabric chip.
摘要翻译： 在一种用于实现交换结构的方法中，在第一结构芯片中，从源结构芯片接收包括目的地节点芯片的标识的分组，以及确定所述交换结构中的分组所在的第一路径 被传送到目的地节点芯片是不可用的。 此外，作出关于是否可以向包括源结构芯片的目的地节点芯片传送分组的另一个路径的确定。 响应于确定另一路径可用，分组沿着另一路径被传送。 此外，响应于确定另一路径不可用，分组被传送回源结构芯片。
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公开(公告)号：US20140211630A1
公开(公告)日：2014-07-31
申请号：US14238519
申请日：2011-09-28
IPC分类号： H04L12/801 , H04L12/823 , H04L12/26
CPC分类号： H04L47/12 , H04L43/0888 , H04L47/32 , H04L49/25
摘要： In a method for managing packet flow in a switch fabric comprising a plurality of fabric chips, wherein a packet comprises a counter, a determination as to whether the packet has been detoured around an unavailable fabric link and a determination as to whether the packet is making forward progress are made. In addition, a value of the counter in the packet is modified in response to a determination that the packet has been detoured around an unavailable fabric link and a determination that forward progress is not being made.
摘要翻译： 在一种用于管理包括多个结构芯片的交换结构中的分组流的方法中，其中分组包括计数器，关于所述分组是否已经围绕不可用的结构链路迂回的确定以及关于分组是否正在进行的确定 取得进展。 此外，响应于分组绕着不可用的结构链路而绕行的确定以及不进行转发的确定来修改分组中的计数器的值。
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公开(公告)号：US07908470B1
公开(公告)日：2011-03-15
申请号：US11590080
申请日：2006-10-31
申请人： Vincent E. Cavanna
发明人： Vincent E. Cavanna
IPC分类号： G06F9/00 , G06F15/177
CPC分类号： G06F9/4401 , G06F9/4405
摘要： The present invention provides a controller that allows plural processor nodes to access plural boot memories concurrently.
摘要翻译： 本发明提供一种控制器，其允许多个处理器节点同时访问多个引导存储器。
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公开(公告)号：US09369296B2
公开(公告)日：2016-06-14
申请号：US14124817
申请日：2011-08-08
IPC分类号： H04L12/18 , H04Q3/00 , H04L12/933 , H04L12/931 , H04L12/24
CPC分类号： H04L12/1886 , H04L41/0668 , H04L49/101 , H04L49/109 , H04L49/201 , H04Q3/0004
摘要： A fabric chip includes a plurality of port interfaces, in which each of the plurality of port interfaces includes a network chip interface (NCI) block having a port resolution module to determine which of the port interfaces is to receive a packet from the NCI block and a crossbar block communicatively coupled with each of the NCI blocks in the plurality of port interfaces. In addition, at least two of the plurality of port interfaces are to be connected to at least two port interfaces of another fabric chip as trunked links of a trunk. Moreover, the NCI blocks of the at least two of the plurality of port interfaces include a resource that keeps track of the port interfaces in the fabric chip that are connected to the trunk links of the trunk.
摘要翻译： 一种结构芯片包括多个端口接口，其中多个端口接口中的每个端口接口包括具有端口分辨率模块的网络芯片接口（NCI）块，以确定端口接口中的哪一个接收来自NCI块的分组;以及 与多个端口接口中的NCI块中的每一个通信地连接的交叉开关块。 此外，多个端口接口中的至少两个将被连接到作为中继线的中继链路的另一个结构芯片的至少两个端口接口。 此外，多个端口接口中的至少两个端口接口中的NCI块包括跟踪结构芯片中连接到中继线的中继链路的端口接口的资源。
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公开(公告)号：US20140198631A1
公开(公告)日：2014-07-17
申请号：US14238573
申请日：2011-09-28
IPC分类号： H04L12/24
CPC分类号： H04L41/12 , H04L41/06 , H04L41/0672 , H04L41/0806 , H04L41/0836 , H04L41/0893 , H04L49/101 , H04L49/65
摘要： In a method for managing a switch fabric comprising a plurality of fabric chips, each of said plurality of fabric chips comprising a plurality of port interfaces, a first configuration set and a second configuration set, each comprising a plurality of configuration registers for the port interfaces to use in calculating a port resolution for an incoming packet, are generated. In addition, a determination as to which of the first configuration set and the second configuration set the plurality of fabric chips are to use is made an instruction is communicated to each of the fabric chips to use the determined one of the first configuration set and the second configuration set.
摘要翻译： 在一种用于管理包括多个结构芯片的交换结构的方法中，所述多个结构芯片中的每一个包括多个端口接口，第一配置集合和第二配置集合，每个配置集合包括用于端口接口的多个配置寄存器 用于计算输入数据包的端口分辨率。 此外，确定关于哪个第一配置集合和第二配置设置多个织物芯片将要使用的指令被传送到每个织物芯片以使用所确定的第一配置集合和 第二配置集。
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公开(公告)号：US20140112125A1
公开(公告)日：2014-04-24
申请号：US14124817
申请日：2011-08-08
IPC分类号： H04L12/18 , H04L12/24 , H04L12/933
CPC分类号： H04L12/1886 , H04L41/0668 , H04L49/101 , H04L49/109 , H04L49/201 , H04Q3/0004
摘要： A fabric chip includes a plurality of port interfaces, in which each of the plurality of port interfaces includes a network chip interface (NCI) block having a port resolution module to determine which of the port interfaces is to receive a packet from the NCI block and a crossbar block communicatively coupled with each of the NCI blocks in the plurality of port interfaces. In addition, at least two of the plurality of port interfaces are to be connected to at least two port interfaces of another fabric chip as trunked links of a trunk. Moreover, the NCI blocks of the at least two of the plurality of port interfaces include a resource that keeps track of the port interfaces in the fabric chip that are connected to the trunk links of the trunk.
摘要翻译： 一种结构芯片包括多个端口接口，其中多个端口接口中的每个端口接口包括具有端口分辨率模块的网络芯片接口（NCI）块，以确定端口接口中的哪一个接收来自NCI块的分组， 与多个端口接口中的NCI块中的每一个通信地连接的交叉开关块。 此外，多个端口接口中的至少两个将被连接到作为中继线的中继链路的另一个结构芯片的至少两个端口接口。 此外，多个端口接口中的至少两个端口接口中的NCI块包括跟踪结构芯片中连接到中继线的中继链路的端口接口的资源。
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公开(公告)号：US09755907B2
公开(公告)日：2017-09-05
申请号：US14238573
申请日：2011-09-28
IPC分类号： H04L12/26 , H04L12/24 , H04L12/931 , H04L12/933
CPC分类号： H04L41/12 , H04L41/06 , H04L41/0672 , H04L41/0806 , H04L41/0836 , H04L41/0893 , H04L49/101 , H04L49/65
摘要： In a method for managing a switch fabric comprising a plurality of fabric chips, each of said plurality of fabric chips comprising a plurality of port interfaces, a first configuration set and a second configuration set, each comprising a plurality of configuration registers for the port interfaces to use in calculating a port resolution for an incoming packet, are generated. In addition, a determination as to which of the first configuration set and the second configuration set the plurality of fabric chips are to use is made an instruction is communicated to each of the fabric chips to use the determined one of the first configuration set and the second configuration set.
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公开(公告)号：US09479391B2
公开(公告)日：2016-10-25
申请号：US14239837
申请日：2011-09-28
IPC分类号： H04L12/703 , H04L12/24 , H04L12/933 , H04L12/947 , H04L12/18 , H04L12/707
CPC分类号： H04L41/0663 , H04L12/1881 , H04L45/22 , H04L49/101 , H04L49/109 , H04L49/25
摘要： In a method for implementing a switch fabric, in a first fabric chip, a packet comprising an identification of a destination node chip is received from a source fabric chip, and a determination that a first path in the switch fabric along which the packet is to be communicated toward the destination node chip is unavailable is made. In addition, a determination as to whether another path along which the packet is to be communicated toward the destination node chip that does not include the source fabric chip is available is made. In response to a determination that the another path is available, the packet is communicated along the another path. In addition, in response to a determination that the another path is unavailable, the packet is communicated back to the source fabric chip.
摘要翻译： 在一种用于实现交换结构的方法中，在第一结构芯片中，从源结构芯片接收包括目的地节点芯片的标识的分组，以及确定所述交换结构中的分组所在的第一路径 被传送到目的地节点芯片是不可用的。 此外，作出关于是否可以向包括源结构芯片的目的地节点芯片传送分组的另一个路径的确定。 响应于确定另一路径可用，分组沿着另一路径被传送。 此外，响应于确定另一路径不可用，分组被传送回源结构芯片。
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