Dummy block replacement for logic simulation
    1.
    发明授权
    Dummy block replacement for logic simulation 失效
    用于逻辑模拟的虚拟块替换

    公开(公告)号:US07330808B1

    公开(公告)日:2008-02-12

    申请号:US10627335

    申请日:2003-07-24

    IPC分类号: G06F17/50

    CPC分类号: G06F17/5022

    摘要: A method (10) of reducing a size of a netlist for a target architecture can include the steps of creating (12) a netlist of objects for the target architecture, identifying (14) objects specific to the target architecture that are repeated regularly to identify potential dummy objects, creating (15) a list of objects used by a design in the target architecture, and forming (16) a list of unused objects in the target architecture from the netlist of objects and the list of objects used by the design. The method can further include the steps of replacing (18) at least one object in the list of unused objects with an appropriate dummy object to form a modified netlist and simulating (19) the modified netlist.

    摘要翻译: 减少目标架构的网表的大小的方法(10)可以包括以下步骤:创建(12)目标架构的对象的网表,识别(14)定期重复的目标架构特有的对象以识别 潜在的虚拟对象,创建(15)目标架构中的设计使用的对象的列表,以及从对象的网表和设计使用的对象的列表中形成(16)目标体系结构中的未使用对象的列表。 该方法还可以包括以下步骤:用适当的虚拟对象来替换(18)未使用对象列表中的至少一个对象,以形成修改的网表并模拟(19)修改的网表。