METHOD AND APPARATUS FOR EFFICIENT PROGRAMMABLE CYCLIC REDUNDANCY CHECK (CRC)
    2.
    发明申请
    METHOD AND APPARATUS FOR EFFICIENT PROGRAMMABLE CYCLIC REDUNDANCY CHECK (CRC) 有权
    有效的可循环冗余检查(CRC)的方法和装置

    公开(公告)号:US20090164546A1

    公开(公告)日:2009-06-25

    申请号:US11963147

    申请日:2007-12-21

    IPC分类号: G06F7/523

    CPC分类号: G06F7/724 G06F7/72 H03M13/09

    摘要: A method and apparatus to optimize each of the plurality of reduction stages in a Cyclic Redundancy Check (CRC) circuit to produce a residue for a block of data decreases area used to perform the reduction while maintaining the same delay through the plurality of stages of the reduction logic. A hybrid mix of Karatsuba algorithm, classical multiplications and serial division in various stages in the CRC reduction circuit results in about a twenty percent reduction in area on the average with no decrease in critical path delay.

    摘要翻译: 一种在循环冗余校验(CRC)电路中优化多个还原级中的每一个以产生数据块的残差的方法和装置减少了用于执行减少的区域,同时通过多个阶段保持相同的延迟 还原逻辑。 在CRC减少电路中,Karatsuba算法,经典乘法和串行划分的混合混合结果导致平均面积减少了约20%,而关键路径延迟没有减少。

    Efficient advanced encryption standard (AES) Datapath using hybrid rijndael S-Box
    3.
    发明申请
    Efficient advanced encryption standard (AES) Datapath using hybrid rijndael S-Box 失效
    高效的高级加密标准(AES)使用混合rijndael S-Box的数据路径

    公开(公告)号:US20080240422A1

    公开(公告)日:2008-10-02

    申请号:US11731159

    申请日:2007-03-30

    IPC分类号: H04L9/00

    摘要: The speed at which an AES decrypt operation may be performed in a general purpose processor is increased by providing a separate decrypt data path. The critical path delay of the aes decrypt path is reduced by combining multiply and inverse operations in the Inverse SubBytes transformation. A further decrease in critical path delay in the aes decrypt data path is provided by merging appropriate constants of the inverse mix-column transform into a map function.

    摘要翻译: 可以通过提供单独的解密数据路径来增加在通用处理器中执行AES解密操作的速度。 通过在逆SubBytes变换中组合乘法和逆运算来减少aes解密路径的关键路径延迟。 通过将反混合列变换的适当常数合并到映射函数中来提供aes解密数据路径中关键路径延迟的进一步减小。

    Normal-basis to canonical-basis transformation for binary galois-fields GF(2m)
    5.
    发明授权
    Normal-basis to canonical-basis transformation for binary galois-fields GF(2m) 有权
    二进制Galois-field的典型基变换法(2m)

    公开(公告)号:US08380777B2

    公开(公告)日:2013-02-19

    申请号:US11772176

    申请日:2007-06-30

    IPC分类号: G06F7/72

    CPC分类号: G06F7/724

    摘要: Basis conversion from normal form to canonical form is provided for both generic polynomials and special irreducible polynomials in the form of “all ones”, referred to as “all-ones-polynomials” (AOP). Generation and storing of large matrices is minimized by creating matrices on the fly, or by providing an alternate means of computing a result with minimal hardware extensions.

    摘要翻译: 对于通用多项式和以所有形式的所有形式的特殊不可约多项式提供了从正常形式到规范形式的基础转换,称为全要素多项式(AOP)。 通过在飞行中创建矩阵,或者通过提供以最小的硬件扩展来计算结果的替代方法来最小化大矩阵的生成和存储。

    Polynomial-basis to normal-basis transformation for binary Galois-Fields GF(2m)
    7.
    发明授权
    Polynomial-basis to normal-basis transformation for binary Galois-Fields GF(2m) 有权
    对于二值Galois-Fields GF(2m)的正态基变换的多项式

    公开(公告)号:US08380767B2

    公开(公告)日:2013-02-19

    申请号:US11772172

    申请日:2007-06-30

    IPC分类号: G06F7/72

    CPC分类号: G06F7/724

    摘要: Basis conversion from polynomial-basis form to normal-basis form is provided for both generic polynomials and special irreducible polynomials in the form of “all ones”, referred to as “all-ones-polynomials” (AOP). Generation and storing of large matrices is minimized by creating matrices on the fly, or by providing an alternate means of computing a result with minimal hardware extensions.

    摘要翻译: 对于通用多项式和以全1形式的特殊不可约多项式,提供了从多项式基形式到正态形式的基础转换,称为全要素多项式(AOP)。 通过在飞行中创建矩阵,或者通过提供以最小的硬件扩展来计算结果的替代方法来最小化大矩阵的生成和存储。

    Efficient advanced encryption standard (AES) datapath using hybrid rijndael S-box
    8.
    发明授权
    Efficient advanced encryption standard (AES) datapath using hybrid rijndael S-box 失效
    使用混合rijndael S盒的高效加密标准(AES)数据通路

    公开(公告)号:US08346839B2

    公开(公告)日:2013-01-01

    申请号:US11731159

    申请日:2007-03-30

    IPC分类号: G06F7/52

    摘要: The speed at which an AES decrypt operation may be performed in a general purpose processor is increased by providing a separate decrypt data path. The critical path delay of the aes decrypt path is reduced by combining multiply and inverse operations in the Inverse SubBytes transformation. A further decrease in critical path delay in the aes decrypt data path is provided by merging appropriate constants of the inverse mix-column transform into a map function.

    摘要翻译: 可以通过提供单独的解密数据路径来增加在通用处理器中执行AES解密操作的速度。 通过在逆SubBytes变换中组合乘法和逆运算来减少aes解密路径的关键路径延迟。 通过将反混合列变换的适当常数合并到映射函数中来提供aes解密数据路径中关键路径延迟的进一步减小。

    Scale-invariant barrett reduction for elliptic-curve cyrptography
    10.
    发明授权
    Scale-invariant barrett reduction for elliptic-curve cyrptography 有权
    椭圆曲线绘图的尺度不变的巴雷特减少

    公开(公告)号:US07978846B2

    公开(公告)日:2011-07-12

    申请号:US11772169

    申请日:2007-06-30

    摘要: The computation time to perform scalar point multiplication in an Elliptic Curve Group is reduced by modifying the Barrett Reduction technique. Computations are performed using an N-bit scaled modulus based a modulus m having k-bits to provide a scaled result, with N being greater than k. The N-bit scaled result is reduced to a k-bit result using a pre-computed N-bit scaled reduction parameter in an optimal manner avoiding shifting/aligning operations for any arbitrary values of k, N.

    摘要翻译: 通过修改Barrett还原技术,减少椭圆曲线组中执行标量点乘积的计算时间。 使用基于具有k位的模数m的N比特缩放模量来执行计算,以提供缩放结果,其中N大于k。 使用预先计算的N比特缩减参数以最佳方式将N比特缩放结果减少到k比特结果,避免任何k,N值的移位/对齐操作。