公开(公告)号：US4947357A

公开(公告)日：1990-08-07

申请号：US159898

申请日：1988-02-24

申请人： W. Kem Stewart ,  Lester M. Crudele ,  Jonathan L. Miller ,  Marco E. Riera ,  Bruce E. Schurmann

发明人： W. Kem Stewart ,  Lester M. Crudele ,  Jonathan L. Miller ,  Marco E. Riera ,  Bruce E. Schurmann

IPC分类号： G01R31/3185

CPC分类号： G01R31/318558

摘要： A digital system that includes a plurality of integrated circuits disposed on a circuit board, each integrated circuit comprising a plurality of scan chains, each scan chain scanning data from a scan input to a scan output in response to a scan clock; each scan input is coupled to a first pad of the integrated circuit, and the scan outputs are multiplexed to a second pad of the integrated circuit; the second pads of the integrated circuits are multiplexed to a port of the circuit board. A controller selects one of the integrated circuits for scanning, the controller selecting the second pad of the selected integrated circuit for coupling to the port of the circuit board; and the controller also selects one of the plurality of scan chains in the selected integrated circuit for scanning, the controller coupling the scan clock to the selected scan chain and selecting the scan output of the selected scan chain for coupling to the second pad of the selected integrated circuit.

摘要翻译： 一种数字系统，包括设置在电路板上的多个集成电路，每个集成电路包括多个扫描链，每个扫描链扫描数据从扫描输入到响应于扫描时钟的扫描输出; 每个扫描输入耦合到集成电路的第一焊盘，并且扫描输出被复用到集成电路的第二焊盘; 集成电路的第二焊盘被复用到电路板的端口。 控制器选择用于扫描的集成电路中的一个，控制器选择所选择的集成电路的第二焊盘以耦合到电路板的端口; 并且所述控制器还选择所选择的集成电路中的所述多个扫描链中的一个进行扫描，所述控制器将所述扫描时钟耦合到所选择的扫描链，并且选择所选择的扫描链的扫描输出以耦合到所选择的扫描链的第二焊盘 集成电路。