摘要:
A computer network system repetitively distributes messages including uniquely identified blocks of real time data containing a current data image over a broadcast communications network to all real time stations for storage of each repetition of each entire block of data directly in station memory at a unique address space assigned to that uniquely identified block of data. The real time stations receive the blocks of data and alternatively receive other messages from the real time stations. The other messages have a recognized standard protocol, such as the TCP/IP or UDP/IP protocol of the Internet Protocol Suite.
摘要:
Real time periodic messages generated by a plurality of stations on a data communication network and having data periods ranging from a shortest to a longest, where the longest data period is an integer multiple of all the others, are assigned by a server station to transmit time slots, equal in duration to the shortest data period, on a global basis to minimize the number of messages transmitted by all stations during each transmit time slot.
摘要:
Updated images of messages are passed between asynchronous digital processors using dual port shared memory. In the basic form of the invention, three buffers in shared memory are assigned to each message. Where one of the processors is a controller for a data link channel carrying n messages, 2n+1 buffers are provided in free shared memory space with 2 buffers assigned to each message at all times and a common buffer serving as the third buffer for all of the messages. Where linked buffers in local memory of a controller processor receive message updates from a data highway, two buffers in shared memory are assigned to each message and a linked buffer in the controller local memory serves as the third buffer. The buffers containing the message updates are passed between processors by use of a buffer status array in shared memory. A semaphore lock in the array permits only one processor at a time to assign or release buffers.
摘要:
A simulator for a distributed process control system utilizes a simulator station as an interface between a plant modeling computer and an instrumentation and control system which uses actual distributed processing units (DPUs) running actual process control software. The simulator station memory maps sensor signals received from the plant modeling computer through reflective memory directly to a memory-mapped input/output (I/O) interface of each DPU at the scan rate, or a multiple of the scan rate, of the DPU, and provides the control signals generated by the DPUs to the plant modeling computer at the same rates. A data highway such as in the actual system provides communications between the DPUs and between the DPUs and operator stations, (and potentially other man-machine interface stations) which provide operator signals used by the DPUs. The simulator station is also connected to the operator stations by the data highway for receiving the operator signals which can include signals controlling simulator operation.