Fully electric field shielding reticle pod
    1.
    发明申请
    Fully electric field shielding reticle pod 审中-公开
    全电场屏蔽光罩荚

    公开(公告)号:US20070076292A1

    公开(公告)日:2007-04-05

    申请号:US11236169

    申请日:2005-09-27

    CPC classification number: G03F7/70741 G03F1/66

    Abstract: A container includes a top wall, side walls, and a bottom wall, designed to enclose a space for storing an insulating object, the top, side and bottom walls having internal surfaces facing the enclosed space and external surface facing away from the enclosed space; and a metallic coating layer disposed on and substantially covering external surfaces of the top, side and bottom walls.

    Abstract translation: 容器包括顶壁,侧壁和底壁,设计成封闭用于存储绝缘物体的空间,顶壁,侧壁和底壁具有面向封闭空间的内表面和背离封闭空间的外表面; 以及设置在顶壁,侧壁和底壁的外表面上并基本上覆盖顶壁,侧壁和底壁的外表面的金属涂层。

    Layer independent alignment system
    2.
    发明授权
    Layer independent alignment system 失效
    层独立对齐系统

    公开(公告)号:US5985764A

    公开(公告)日:1999-11-16

    申请号:US995994

    申请日:1997-12-22

    CPC classification number: G03F9/70

    Abstract: A method is disclosed for aligning wafers independent of the planarity of layers that are formed on a wafer. In prior art, it is found that when aligning wafers from the front or device side, the alignment of the masks vary because of the variations on the topography of the particular layer in process. Since the topography of a layer is influenced by the cumulative effect of the number of underlying features that are disposed on top of each other, severe misalignments can occur causing defective parts. The problem is eliminated by depositing an infrared reflective (IR) coating over alignment marks formed on oxide layer covering the devices on a wafer, and performing alignment with respect to the reflective marks by projecting IR energy through an IR transparent stage placed under the backside of the wafer and using an IR microscope. Since silicon substrate is also IR transparent, alignment can be performed from the back side in exactly the same way each time the wafer is aligned independent of the layer topography on the front side.

    Abstract translation: 公开了一种独立于形成在晶片上的层的平面度对准晶片的方法。 在现有技术中,发现当从正面或器件侧对准晶片时,掩模的对准由于处理中的特定层的形貌的变化而变化。 由于层的形貌受到彼此排列的底层特征数量的累积影响的影响,可能会导致严重的不对准,导致有缺陷的部件。 通过在覆盖晶片上的器件的氧化物层上形成的对准标记上沉积红外反射(IR)涂层来消除问题,并且通过将IR能量投射到放置在反射标记的背面的IR透明级 晶圆并使用红外显微镜。 由于硅衬底也是IR透明的,所以每当晶片独立于前侧的层形貌排列时,可以以完全相同的方式从背面进行对准。

    METHOD OF ASSEMBLING LCD PANEL, INTERFACE APPARATUS, AND ASSEMBLING APPARATUS
    3.
    发明申请
    METHOD OF ASSEMBLING LCD PANEL, INTERFACE APPARATUS, AND ASSEMBLING APPARATUS 审中-公开
    装配液晶面板,接口装置和组装装置的方法

    公开(公告)号:US20100120318A1

    公开(公告)日:2010-05-13

    申请号:US12481308

    申请日:2009-06-09

    CPC classification number: G02F1/1333 G02F2001/133354

    Abstract: The present invention provides a method of assembling an LCD panel, an interface apparatus, and an assembling apparatus. In this invention, the first panel of the LCD panel is mounted on the interface apparatus before being pressed to the second panel of the LCD panel. Therefore, the complexity of the assembly room can be simplified and the cycle time in the assembly room can be shortened by moving the processes of flatly attaching and separating panels out of the assembly room. The interface apparatus is easier to be processed than a glass substrate during operation. The design of the interface apparatus can simplify the mechanisms in the assembly room and shorten the cycle time. The usage of the interface apparatus can reduce the alignment error caused by nonsynchronization of releasing static electricity suckers.

    Abstract translation: 本发明提供了组装LCD面板,接口装置和组装装置的方法。 在本发明中,LCD面板的第一面板在被按压到LCD面板的第二面板之前被安装在接口装置上。 因此,可以简化装配室的复杂性,并且可以通过将平面连接和将板分离出组装室的过程来缩短组装室中的循环时间。 在操作中,接口装置比玻璃基板更容易处理。 接口设备的设计可以简化组装室的机制,缩短循环时间。 接口装置的使用可以减少释放静电吸盘的非同步引起的对准误差。

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