公开(公告)号：US20100054392A1

公开(公告)日：2010-03-04

申请号：US12429018

申请日：2009-04-23

申请人： Wen-pin Chen ,  Lee-hsun Chang ,  Je-hao Hsu

发明人： Wen-pin Chen ,  Lee-hsun Chang ,  Je-hao Hsu

IPC分类号： G11C19/00

CPC分类号： G11C19/28 ,  G09G2310/0286 ,  G09G2320/0266

摘要： A shift register includes a plurality of stages cascade-connected with each other. Each stage includes a pull-up circuit, a pull-up driving circuit, and a pull-down circuit. The pull-up circuit coupled to a first clock signal is used for providing an output signal. The pull-up driving circuit includes a control circuit and a first transistor. The control circuit has a gate coupled to a previous stage, and a drain coupled to a second clock signal. The first transistor includes a gate coupled to the source of the control circuit, a drain coupled to a driving end of the previous stage, and a source coupled to a first input end. The pull-down circuit pulls down voltage on the first input end.

摘要翻译： 移位寄存器包括彼此串联连接的多个级。 每个级包括上拉电路，上拉驱动电路和下拉电路。 耦合到第一时钟信号的上拉电路用于提供输出信号。 上拉驱动电路包括控制电路和第一晶体管。 控制电路具有耦合到前一级的栅极和耦合到第二时钟信号的漏极。 第一晶体管包括耦合到控制电路的源极的栅极，耦合到前一级的驱动端的漏极和耦合到第一输入端的源极。 下拉电路拉低第一个输入端的电压。

公开(公告)号：US07907696B2

公开(公告)日：2011-03-15

申请号：US12429018

申请日：2009-04-23

申请人： Wen-pin Chen ,  Lee-hsun Chang ,  Je-hao Hsu

发明人： Wen-pin Chen ,  Lee-hsun Chang ,  Je-hao Hsu

IPC分类号： G11C19/00

CPC分类号： G11C19/28 ,  G09G2310/0286 ,  G09G2320/0266

摘要： A shift register includes a plurality of stages cascade-connected with each other. Each stage includes a pull-up circuit, a pull-up driving circuit, and a pull-down circuit. The pull-up circuit coupled to a first clock signal is used for providing an output signal. The pull-up driving circuit includes a control circuit and a first transistor. The control circuit has a gate coupled to a previous stage, and a drain coupled to a second clock signal. The first transistor includes a gate coupled to the source of the control circuit, a drain coupled to a driving end of the previous stage, and a source coupled to a first input end. The pull-down circuit pulls down voltage on the first input end.

摘要翻译： 移位寄存器包括彼此串联连接的多个级。 每个级包括上拉电路，上拉驱动电路和下拉电路。 耦合到第一时钟信号的上拉电路用于提供输出信号。 上拉驱动电路包括控制电路和第一晶体管。 控制电路具有耦合到前一级的栅极和耦合到第二时钟信号的漏极。 第一晶体管包括耦合到控制电路的源极的栅极，耦合到前一级的驱动端的漏极和耦合到第一输入端的源极。 下拉电路拉低第一个输入端的电压。