公开(公告)号：US10831232B2

公开(公告)日：2020-11-10

申请号：US16276744

申请日：2019-02-15

申请人： Wisconsin Alumni Research Foundation

发明人： Gokul Subramanian Ravi ,  Mikko H. Lipasti

IPC分类号： G06F1/10 ,  G06F9/38

摘要： A computer architecture suitable for out-of-order processors manages the problem of timing slack, in which an instruction completes before its clock cycle, by recycling that slack to allow the next succeeding instruction allowing that instruction to begin execution earlier. This recycling mechanism is enabled through the use of a transparent gating between execution units which allows data transfer before clock cycle boundaries and, in some cases, by aggressively issuing children instructions contemporaneously with their parent instruction after a grandparent instruction is issued.

公开(公告)号：US20200264652A1

公开(公告)日：2020-08-20

申请号：US16276744

申请日：2019-02-15

申请人： Wisconsin Alumni Research Foundation

发明人： Gokul Subramanian Ravi ,  Mikko H. Lipasti

IPC分类号： G06F1/10 ,  G06F9/38

摘要： A computer architecture suitable for out-of-order processors manages the problem of timing slack, in which an instruction completes before its clock cycle, by recycling that slack to allow the next succeeding instruction allowing that instruction to begin execution earlier. This recycling mechanism is enabled through the use of a transparent gating between execution units which allows data transfer before clock cycle boundaries and, in some cases, by aggressively issuing children instructions contemporaneously with their parent instruction after a grandparent instruction is issued.