Active clamp circuit for electronic components
    1.
    发明申请
    Active clamp circuit for electronic components 有权
    电子元件有源钳位电路

    公开(公告)号:US20090110117A1

    公开(公告)日:2009-04-30

    申请号:US11981196

    申请日:2007-10-31

    IPC分类号: H03K5/08 H04L25/06

    CPC分类号: H03K5/08 H03M1/1295

    摘要: An active clamp circuit for electronic components includes two sets of diode connected transistors that are inversely connected in parallel across an output of the component for providing both positive and negative differential conducting paths. The diode connected transistors cooperatively operate to limit a differential output voltage between the positive and negative conducting paths. An emitter follower buffer includes the clamp circuit and is configured to limit RF energy incident to an analog to digital converter (ADC). The emitter follower buffer includes two input transistors having their emitters each connected to at least one diode connected transistor connected to the clamp circuit. A receiver includes the differential amplifier and an analog to digital converter. A method for limiting the energy of analog signals in the receiver includes the step of operating the clamp circuit to limit the analog signals transmitted to the analog to digital converter (ADC).

    摘要翻译: 用于电子部件的有源钳位电路包括两组二极管连接的晶体管,其跨部件的输出并联反并联,以提供正和负差分导电路径。 二极管连接的晶体管协同工作,以限制正和负导电路径之间的差分输出电压。 射极跟随器缓冲器包括钳位电路并且被配置为限制入射到模数转换器(ADC)的RF能量。 射极跟随器缓冲器包括两个输入晶体管,它们的发射极各自连接到连接到钳位电路的至少一个二极管连接的晶体管。 接收机包括差分放大器和模数转换器。 用于限制接收机中的模拟信号的能量的方法包括操作钳位电路以限制发送到模数转换器(ADC)的模拟信号的步骤。

    Active clamp circuit for electronic components
    2.
    发明授权
    Active clamp circuit for electronic components 有权
    电子元件有源钳位电路

    公开(公告)号:US07724061B2

    公开(公告)日:2010-05-25

    申请号:US11981196

    申请日:2007-10-31

    IPC分类号: H03L5/00

    CPC分类号: H03K5/08 H03M1/1295

    摘要: An active clamp circuit for electronic components includes two sets of diode connected transistors that are inversely connected in parallel across an output of the component for providing both positive and negative differential conducting paths. The diode connected transistors cooperatively operate to limit a differential output voltage between the positive and negative conducting paths. An emitter follower buffer includes the clamp circuit and is configured to limit RF energy incident to an analog to digital converter (ADC). The emitter follower buffer includes two input transistors having their emitters each connected to at least one diode connected transistor connected to the clamp circuit. A receiver includes the differential amplifier and an analog to digital converter. A method for limiting the energy of analog signals in the receiver includes the step of operating the clamp circuit to limit the analog signals transmitted to the analog to digital converter (ADC).

    摘要翻译: 用于电子部件的有源钳位电路包括两组二极管连接的晶体管,其跨部件的输出并联反并联,以提供正和负差分导电路径。 二极管连接的晶体管协同工作,以限制正和负导电路径之间的差分输出电压。 射极跟随器缓冲器包括钳位电路并且被配置为限制入射到模数转换器(ADC)的RF能量。 射极跟随器缓冲器包括两个输入晶体管,它们的发射极各自连接到连接到钳位电路的至少一个二极管连接的晶体管。 接收机包括差分放大器和模数转换器。 用于限制接收机中的模拟信号的能量的方法包括操作钳位电路以限制发送到模数转换器(ADC)的模拟信号的步骤。