公开(公告)号：US07227200B2

公开(公告)日：2007-06-05

申请号：US11145984

申请日：2005-06-07

Applicant: Woo-jin Jin

Inventor： Woo-jin Jin

IPC: H01L27/10

CPC classification number: H01L23/5223 ,  H01L2924/0002 ,  H01L2924/00

Abstract: There are provided a metal I/O ring structure for a semiconductor chip and a decoupling capacitance structure using the same. In the Metal I/O ring structure, a plurality of first metal lines are formed on a first metal layer and connected with a power supply voltage, and a plurality of second metal lines are formed on the first metal layer and connected with a ground voltage. The second metal lines are arranged neighboring to the first metal lines. The second metal lines are connected with a second metal layer disposed below the first metal lines on the metal layer, and the first metal lines are connected with the second metal layer disposed below the second metal lines on the first metal layer. An insulating layer is disposed between the first metal layer and the second metal layer, thereby forming a decoupling capacitance between the first metal lines and the second metal lines.

Abstract translation: 提供了用于半导体芯片的金属I / O环结构和使用其的去耦电容结构。 在金属I / O环结构中，多个第一金属线形成在第一金属层上并与电源电压连接，并且多个第二金属线形成在第一金属层上并与接地电压 。 第二金属线布置成与第一金属线相邻。 第二金属线与设置在金属层上的第一金属线下方的第二金属层连接，并且第一金属线与设置在第一金属层上的第二金属线下方的第二金属层连接。 绝缘层设置在第一金属层和第二金属层之间，从而在第一金属线和第二金属线之间形成去耦电容。

公开(公告)号：US20060071241A1

公开(公告)日：2006-04-06

申请号：US11145984

申请日：2005-06-07

Applicant: Woo-jin Jin

Inventor： Woo-jin Jin

IPC: H01L29/74

CPC classification number: H01L23/5223 ,  H01L2924/0002 ,  H01L2924/00

Abstract: There are provided a metal I/O ring structure for a semiconductor chip and a decoupling capacitance structure using the same. In the Metal I/O ring structure, a plurality of first metal lines are formed on a first metal layer and connected with a power supply voltage, and a plurality of second metal lines are formed on the first metal layer and connected with a ground voltage. The second metal lines are arranged neighboring to the first metal lines. The second metal lines are connected with a second metal layer disposed below the first metal lines on the metal layer, and the first metal lines are connected with the second metal layer disposed below the second metal lines on the first metal layer. An insulating layer is disposed between the first metal layer and the second metal layer, thereby forming a decoupling capacitance between the first metal lines and the second metal lines.

Abstract translation: 提供了用于半导体芯片的金属I / O环结构和使用其的去耦电容结构。 在金属I / O环结构中，多个第一金属线形成在第一金属层上并与电源电压连接，并且多个第二金属线形成在第一金属层上并与接地电压 。 第二金属线布置成与第一金属线相邻。 第二金属线与设置在金属层上的第一金属线下方的第二金属层连接，并且第一金属线与设置在第一金属层上的第二金属线下方的第二金属层连接。 绝缘层设置在第一金属层和第二金属层之间，从而在第一金属线和第二金属线之间形成去耦电容。