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公开(公告)号:US11569820B2
公开(公告)日:2023-01-31
申请号:US17709164
申请日:2022-03-30
Applicant: XILINX, INC.
Inventor: John Edward McGrath , Woon Wong , John O'Dwyer , Paul Newson , Brendan Farley
IPC: H03K19/1776
Abstract: An example programmable device includes a configuration memory configured to store configuration data; a programmable logic having a configurable functionality based on the configuration data in the configuration memory; a signal conversion circuit; a digital processing circuit; an endpoint circuit coupled to the signal conversion circuit through the digital processing circuit; wherein the digital processing circuit includes a first one or more digital processing functions implemented as hardened circuits each having a predetermined functionality, and a second one or more processing functions implemented by the configurable functionality of the programmable logic.
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公开(公告)号:US11777503B2
公开(公告)日:2023-10-03
申请号:US17453310
申请日:2021-11-02
Applicant: XILINX, INC.
Inventor: John Edward McGrath , Woon Wong , John O'Dwyer , Paul Newson , Brendan Farley
IPC: H03K19/1776
CPC classification number: H03K19/1776
Abstract: An example programmable device includes a configuration memory configured to store configuration data; a programmable logic having a configurable functionality based on the configuration data in the configuration memory; a signal conversion circuit; a digital processing circuit; an endpoint circuit coupled to the signal conversion circuit through the digital processing circuit; wherein the digital processing circuit includes a first one or more digital processing functions implemented as hardened circuits each having a predetermined functionality, and a second one or more processing functions implemented by the configurable functionality of the programmable logic.
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公开(公告)号:US11563435B2
公开(公告)日:2023-01-24
申请号:US17709167
申请日:2022-03-30
Applicant: XILINX, INC.
Inventor: John Edward McGrath , Woon Wong , John O'Dwyer , Paul Newson , Brendan Farley
IPC: H03K19/1776
Abstract: An example programmable device includes a configuration memory configured to store configuration data; a programmable logic having a configurable functionality based on the configuration data in the configuration memory; a signal conversion circuit; a digital processing circuit; an endpoint circuit coupled to the signal conversion circuit through the digital processing circuit; wherein the digital processing circuit includes a first one or more digital processing functions implemented as hardened circuits each having a predetermined functionality, and a second one or more processing functions implemented by the configurable functionality of the programmable logic.
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公开(公告)号:US11196423B1
公开(公告)日:2021-12-07
申请号:US16911361
申请日:2020-06-24
Applicant: XILINX, INC.
Inventor: John McGrath , Woon Wong , John O'Dwyer , Paul Newson , Brendan Farley
IPC: H03K19/1776
Abstract: An example programmable device includes a configuration memory configured to store configuration data; a programmable logic having a configurable functionality based on the configuration data in the configuration memory; a signal conversion circuit; a digital processing circuit; an endpoint circuit coupled to the signal conversion circuit through the digital processing circuit; wherein the digital processing circuit includes a first one or more digital processing functions implemented as hardened circuits each having a predetermined functionality, and a second one or more processing functions implemented by the configurable functionality of the programmable logic.
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公开(公告)号:US10720926B1
公开(公告)日:2020-07-21
申请号:US16682818
申请日:2019-11-13
Applicant: XILINX, INC.
Inventor: John McGrath , Woon Wong , John O'Dwyer , Paul Newson , Brendan Farley
IPC: H03K19/1776
Abstract: An example programmable device includes a configuration memory configured to store configuration data; a programmable logic having a configurable functionality based on the configuration data in the configuration memory; a signal conversion circuit; a digital processing circuit; an endpoint circuit coupled to the signal conversion circuit through the digital processing circuit; wherein the digital processing circuit includes a first one or more digital processing functions implemented as hardened circuits each having a predetermined functionality, and a second one or more processing functions implemented by the configurable functionality of the programmable logic.
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