公开(公告)号：US11169892B1

公开(公告)日：2021-11-09

申请号：US17169067

申请日：2021-02-05

Applicant: XILINX, INC.

Inventor： Sarosh Azad ,  Akshay Shetty ,  Alex Warshofsky

IPC: G06F11/16

Abstract: Embodiments herein describe a hardware solution where a reset monitor in an integrated circuit detects and reports unintentional resets. A glitch in a reset path can cause a logic block to initiate an undesired or unintentional reset. As a result, the local circuitry in the logic block resets which causes them to lose data and their current state. In the embodiments herein, the reset monitor can monitor the reset signals generated within the logic blocks in the circuit. The reset monitor can compare these reset signals to golden copies of the resets signals generated by the reset generator. If a reset signal generated within a logic block does not match the corresponding golden copy of the reset signal, the reset monitor determines that an unintentional reset has occurred.