公开(公告)号：US20250112933A1

公开(公告)日：2025-04-03

申请号：US18478438

申请日：2023-09-29

Applicant: Xilinx, Inc.

Inventor： David Andrews ,  David Lawrie ,  Victor Wu ,  Po-Ching Sun ,  Dmitri Kitariev ,  David Riddoch

IPC: H04L9/40 ,  H04L1/00 ,  H04L43/0823

Abstract: Described herein are systems and methods for managing error detection in a message. A circuit can identify, based on an error detection configuration of the at least one circuit, a first portion of the message to be checked for errors before a second portion of the message is available to the at least one circuit, the first portion being less than all of the message to be checked for one or more errors. A circuit can analyze a number of bits of the first portion of the message using the at least one circuit and based on the error detection configuration. A circuit can, based on analyzing the first portion, determine whether the message includes the one or more errors. Various other methods, systems, and computer-readable media are also disclosed.