公开(公告)号：US11134256B1

公开(公告)日：2021-09-28

申请号：US16745163

申请日：2020-01-16

Applicant: Xilinx, Inc.

Inventor： Avinash Ramachandran ,  Pavel Novotny

IPC: H04N7/12 ,  H04N19/436 ,  H04N19/91 ,  H04N19/176 ,  H04N19/152 ,  H04N19/115 ,  H04N19/164 ,  H04N19/127

Abstract: Methods and systems for parallelized encoding of video are disclosed. According to one embodiment, a video encoder comprises a plurality of encoding engines. Each encoding engine is configured to receive a respective designated region of a video frame and produce respective quantized coefficients, the respective region having one or more unencoded frame blocks. Each encoding engine has a local symcoder for performing entropy-based encoding of the respective quantized coefficients. The video encoder has a rate control module, in communication with each encoding engine, for receiving from the respective local symcoder of each encoding engine a respective region-level bit count. The video encoder has a central buffer, in communication with each encoding engine, for receiving from each encoding engine the respective quantized coefficients. The video encoder has a final symcoder, in communication with the central buffer and the rate control module, wherein the final symcoder performs further entropy-based encoding of the respective quantized coefficients received in the central buffer, and transmits to the rate control module a frame-level bit count.