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公开(公告)号:US20230359801A1
公开(公告)日:2023-11-09
申请号:US17662037
申请日:2022-05-04
Applicant: Xilinx, Inc.
Inventor: Sreesan Venkatakrishnan , Nitin Deshmukh , Satish B. Sivaswamy
IPC: G06F30/394 , G06F30/398
CPC classification number: G06F30/394 , G06F30/398 , G06F2111/04
Abstract: Routing a circuit design includes generating a graph of the circuit design where each connected component is represented as a vertex, generating a routing solution for the circuit design by routing packet-switched nets so that the packet-switched nets of a same connected component do not overlap, and, for each routing resource that is shared by packet-switched nets of different connected components, indicating the shared routing resource on the graph by adding an edge. Cycle detection may be performed on the graph. For each cycle detected on the graph, the cycle may be broken by deleting the edge from the graph and ripping-up a portion of the routing solution corresponding to the deleted edge. The circuit design, or portion thereof, for which the routing solution was ripped up may be re-routed using an increased cost for a shared routing resource freed from the ripping-up.
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公开(公告)号:US11604751B1
公开(公告)日:2023-03-14
申请号:US17316584
申请日:2021-05-10
Applicant: XILINX, INC.
Inventor: Brian Guttag , Nitin Deshmukh , Sreesan Venkatakrishnan , Satish Sivaswamy
IPC: G06F13/40
Abstract: Embodiments herein describe techniques for preventing a stall when transmitting data between a producer and a consumer in the same integrated circuit (IC). A stall can occur when there is a split point and a convergence point between the producer and consumer. To prevent the stall, the embodiments herein adjust the latencies of one of the paths (or both paths) such that a maximum latency of the shorter path is greater than, or equal to, the minimum latency of the longer path. When this condition is met, this means the shortest path has sufficient buffers (e.g., a sufficient number of FIFOs and registers) to queue/store packets along its length so that a packet can travel along the longer path and reach the convergence point before the buffers in the shortest path are completely full (or just become completely full).
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