公开(公告)号：US10255400B1

公开(公告)日：2019-04-09

申请号：US15473883

申请日：2017-03-30

Applicant: Xilinx, Inc.

Inventor： Jason Villarreal ,  Xiaoyong Liu ,  Kumar Deepak

IPC: G06F17/50

Abstract: Disclosed approaches for configuring a memory include generating by a high-level synthesis (HLS) tool executing on a computer system, a first mapping of elements of a high-level language (HLL) program to elements of a hardware language finite state machine that represents a circuit implementation of the HLL program. The HLS tool further generates a second mapping of lines of the HLL program to states of the hardware language finite state machine and stores the information describing the first mapping and the second mapping in a data structure of a database in the memory.