公开(公告)号：US20100271522A1

公开(公告)日：2010-10-28

申请号：US12763464

申请日：2010-04-20

申请人： Yoshiyuki MATSUNAGA ,  Kunihiko HARA ,  Hiroyuki HAYASHITA ,  Yoshihisa MINAMI

发明人： Yoshiyuki MATSUNAGA ,  Kunihiko HARA ,  Hiroyuki HAYASHITA ,  Yoshihisa MINAMI

IPC分类号： H04N5/335

CPC分类号： H04N5/378 ,  H04N5/2176 ,  H04N5/347 ,  H04N5/3658

摘要： The present invention provides a solid-state imaging device which is capable of high-speed and high-quality pixel mixture. The solid-state imaging device includes: a plurality of pixels; a row selecting circuit; a plurality of column signal lines each of which is provided to a corresponding one of columns of pixels, is connected to pixels of the corresponding column, and transfers the signals outputted from the connected pixels; a pixel current source which (i) is provided to a corresponding one of the column signal lines, (ii) is connected to the corresponding column signal line, and (iii) supplies to the connected column signal line a current when the signal is outputted from the selected pixel to the connected column signal line; and a control unit which changes the number of rows of pixels being simultaneously selected by the row selecting circuit, and values of the current supplied by the pixel current source.

摘要翻译： 本发明提供了能够进行高速，高质量的像素混合的固态成像装置。 固态成像装置包括：多个像素; 一行选择电路; 多个列信号线被提供给相应列的像素，连接到相应列的像素，并传送从连接的像素输出的信号; （i）被提供给相应的一列列信号线的像素电流源连接到对应的列信号线，并且（iii）在输出信号时向连接的列信号线提供电流 从所选择的像素到所连接的列信号线; 以及控制单元，其改变由行选择电路同时选择的像素的行数，以及由像素电流源提供的电流的值。

公开(公告)号：US20090157932A1

公开(公告)日：2009-06-18

申请号：US12369986

申请日：2009-02-12

申请人： Hiroyuki HAYASHITA

发明人： Hiroyuki HAYASHITA

IPC分类号： G06F13/00

CPC分类号： G06F13/4291

摘要： Multiple master devices and multiple slave devices are connected in parallel to two bus lines including a SCL line 1 and a SDA line 2, and a pullup resistor is connected between the bus lines and a power source. A state detector detects a frozen state on the basis of the states of the SCL line and SDA line and outputs a freeze detection signal, and it detects a freeze released state so as to output a freeze-release detection signal. A pulse generator supplies a pulse signal corresponding to a clock signal to the SCL line in accordance with the freeze-release detection signal. A reset signal generator sends a reset signal to the multiple master devices in accordance with the freeze-release detection signal. The multiple master devices return to the normal communication state in accordance with the supply of the reset signal. It is possible to restore the system even when the slave device returns an acknowledge signal for an incorrect bit and the IIC bus communication freezes.

公开(公告)号：US20070112990A1

公开(公告)日：2007-05-17

申请号：US11557788

申请日：2006-11-08

申请人： Hiroyuki HAYASHITA

发明人： Hiroyuki HAYASHITA

IPC分类号： G06F13/14

CPC分类号： G06F13/4291

摘要： Multiple master devices and multiple slave devices are connected in parallel to two bus lines including a SCL line 1 and a SDA line 2, and a pullup resistor is connected between the bus lines and a power source. A state detector detects a frozen state on the basis of the states of the SCL line and SDA line and outputs a freeze detection signal, and it detects a freeze released state so as to output a freeze-release detection signal. A pulse generator supplies a pulse signal corresponding to a clock signal to the SCL line in accordance with the freeze-release detection signal. A reset signal generator sends a reset signal to the multiple master devices in accordance with the freeze-release detection signal. The multiple master devices return to the normal communication state in accordance with the supply of the reset signal. It is possible to restore the system even when the slave device returns an acknowledge signal for an incorrect bit and the IIC bus communication freezes.

摘要翻译： 多个主设备和多个从设备并行连接到包括SCL线1和SDA线2的两条总线，并且上拉电阻连接在总线和电源之间。 状态检测器基于SCL线和SDA线的状态检测冻结状态，并输出冻结检测信号，并检测冻结释放状态，以输出冷冻释放检测信号。 脉冲发生器根据冻结释放检测信号向SCL线提供对应于时钟信号的脉冲信号。 复位信号发生器根据冷冻释放检测信号向多个主设备发送复位信号。 多个主设备根据复位信号的供应返回到正常通信状态。 即使从设备返回错误位的确认信号并且IIC总线通信冻结，也可以恢复系统。

公开(公告)号：US20110082957A1

公开(公告)日：2011-04-07

申请号：US12956465

申请日：2010-11-30

申请人： Hiroyuki HAYASHITA

发明人： Hiroyuki HAYASHITA

IPC分类号： G06F13/00

CPC分类号： G06F13/4291

摘要： Multiple master devices and multiple slave devices are connected in parallel to two bus lines including a SCL line 1 and a SDA line 2, and a pullup resistor is connected between the bus lines and a power source. A state detector detects a frozen state on the basis of the states of the SCL line and SDA line and outputs a freeze detection signal, and it detects a freeze released state so as to output a freeze-release detection signal. A pulse generator supplies a pulse signal corresponding to a clock signal to the SCL line in accordance with the freeze-release detection signal. A reset signal generator sends a reset signal to the multiple master devices in accordance with the freeze-release detection signal. The multiple master devices return to the normal communication state in accordance with the supply of the reset signal. It is possible to restore the system even when the slave device returns an acknowledge signal for an incorrect bit and the IIC bus communication freezes.

摘要翻译： 多个主设备和多个从设备并行连接到包括SCL线1和SDA线2的两条总线，并且上拉电阻连接在总线和电源之间。 状态检测器基于SCL线和SDA线的状态检测冻结状态，并输出冻结检测信号，并检测冻结释放状态，以输出冷冻释放检测信号。 脉冲发生器根据冻结释放检测信号向SCL线提供对应于时钟信号的脉冲信号。 复位信号发生器根据冷冻释放检测信号向多个主设备发送复位信号。 多个主设备根据复位信号的供应返回到正常通信状态。 即使从设备返回错误位的确认信号并且IIC总线通信冻结，也可以恢复系统。

公开(公告)号：US20090157931A1

公开(公告)日：2009-06-18

申请号：US12369953

申请日：2009-02-12

申请人： Hiroyuki HAYASHITA

发明人： Hiroyuki HAYASHITA

IPC分类号： G06F13/00

CPC分类号： G06F13/4291

摘要： Multiple master devices and multiple slave devices are connected in parallel to two bus lines including a SCL line 1 and a SDA line 2, and a pullup resistor is connected between the bus lines and a power source. A state detector detects a frozen state on the basis of the states of the SCL line and SDA line and outputs a freeze detection signal, and it detects a freeze released state so as to output a freeze-release detection signal. A pulse generator supplies a pulse signal corresponding to a clock signal to the SCL line in accordance with the freeze-release detection signal. A reset signal generator sends a reset signal to the multiple master devices in accordance with the freeze-release detection signal. The multiple master devices return to the normal communication state in accordance with the supply of the reset signal. It is possible to restore the system even when the slave device returns an acknowledge signal for an incorrect bit and the IIC bus communication freezes.

摘要翻译： 多个主设备和多个从设备并行连接到包括SCL线1和SDA线2的两条总线，并且上拉电阻连接在总线和电源之间。 状态检测器基于SCL线和SDA线的状态检测冻结状态，并输出冻结检测信号，并检测冻结释放状态，以输出冷冻释放检测信号。 脉冲发生器根据冻结释放检测信号向SCL线提供对应于时钟信号的脉冲信号。 复位信号发生器根据冷冻释放检测信号向多个主设备发送复位信号。 多个主设备根据复位信号的供应返回到正常通信状态。 即使从设备返回错误位的确认信号并且IIC总线通信冻结，也可以恢复系统。