THIN FILM TRANSISTOR SUBSTRATE HAVING ELECTRODE LAYERS THAT ARE FORMED ON INSULATING LAYER TO COVER COMMON VOLTAGE LINE AND GROUNDING LINE
    2.
    发明申请
    THIN FILM TRANSISTOR SUBSTRATE HAVING ELECTRODE LAYERS THAT ARE FORMED ON INSULATING LAYER TO COVER COMMON VOLTAGE LINE AND GROUNDING LINE 有权
    具有在绝缘层上形成的电极层的薄膜晶体管衬底以覆盖公共电压线和接地线

    公开(公告)号:US20100136719A1

    公开(公告)日:2010-06-03

    申请号:US12697962

    申请日:2010-02-01

    申请人: Young-Hun LEE

    发明人: Young-Hun LEE

    IPC分类号: H01L21/77

    摘要: According to an embodiment, there is provided a fabricating method for a thin film transistor substrate divided into a display area displaying images and a non-display area beside the display area, the fabricating method comprising: forming a gate wire in the display area, a common voltage line for a MPS (mass production system) test in the non-display area, and a grounding line for the MPS test in the non-display area with same material at the same time; forming a gate insulating layer covering the gate wire and a first insulating layer covering the common voltage line for the MPS test and the grounding line for the MPS test with same material at the same time; forming a data wire crossing the gate wire and defining a pixel area in the display area; and forming a pixel electrode in the pixel area and an electrode layer on the first insulating layer corresponding to the common voltage line for the MPS test and the grounding line for the MPS test with same material at the same time.

    摘要翻译: 根据一个实施例,提供了一种薄膜晶体管衬底的制造方法,该薄膜晶体管衬底被划分为在显示区域旁边显示图像和非显示区域的显示区域,所述制造方法包括:在显示区域中形成栅极线, 在非显示区域进行MPS(批量生产系统)测试的公共电压线,以及同时在同一材料的非显示区域进行MPS测试的接地线; 同时形成覆盖栅极线的栅绝缘层和覆盖用于MPS测试的公共电压线的第一绝缘层和用于具有相同材料的MPS测试的接地线; 形成穿过所述栅极线并在所述显示区域中限定像素区域的数据线; 并且在同一材料的同时,在像素区域中形成像素电极和对应于用于MPS测试的公共电压线的第一绝缘层上的电极层和用于MPS测试的接地线。