公开(公告)号：US07596655B2

公开(公告)日：2009-09-29

申请号：US11368488

申请日：2006-03-07

申请人： Yu-Hsien Wang ,  Chanson Lin ,  Tung-Hsien Wu ,  Chien-Chang Su ,  Gow-Jeng Lin ,  Ching-Chung Hsu ,  Kuang-Yuan Chen

发明人： Yu-Hsien Wang ,  Chanson Lin ,  Tung-Hsien Wu ,  Chien-Chang Su ,  Gow-Jeng Lin ,  Ching-Chung Hsu ,  Kuang-Yuan Chen

IPC分类号： G06F12/00

CPC分类号： G06F12/0246

摘要： A flash storage comprises a flash memory, including a plurality of physical memory blocks, each of physical memory blocks comprising a plurality of memory segments, and a plurality of physical sectors, and each of physical sectors being further provided therein with at least a user data column and a logical address pointer column. When physical data is written into the user data column, writing logical address pointer data into the logical address pointer column of the same physical sector may be performed together by the control of a micro-controller. Furthermore, the logical address pointer data in the same memory segment are arranged to be a backup memory segment address mapping table and then stored in one physical memory block. The backup memory segment address mapping table may be loaded directly and stored into a registered memory by the micro-controller when the system boots. Thus, not only shortening the startup duration of the flash storage, but also saving the memory capacity of the registered memory and securing data access may be obtained.

摘要翻译： 闪存存储器包括闪速存储器，其包括多个物理存储器块，每个物理存储器块包括多个存储器段和多个物理扇区，并且每个物理扇区进一步在其中提供至少一个用户数据 列和逻辑地址指针列。 当将物理数据写入用户数据列时，可以通过微控制器的控制将逻辑地址指针数据写入相同物理扇区的逻辑地址指针列中。 此外，同一存储器段中的逻辑地址指针数据被布置为备份存储器段地址映射表，然后存储在一个物理存储器块中。 备份存储器段地址映射表可以在系统启动时由微控制器直接加载并存储到注册的存储器中。 因此，不仅可以缩短闪存存储器的启动持续时间，还可以节省注册存储器的存储容量并保护数据访问。

公开(公告)号：US20060271727A1

公开(公告)日：2006-11-30

申请号：US11368488

申请日：2006-03-07

申请人： Yu-Hsien Wang ,  Chanson Lin ,  Tung-Hsien Wu ,  Chien-Chang Su ,  Gow-Jeng Lin ,  Ching-Chung Hsu ,  Kuang-Yuan Chen

发明人： Yu-Hsien Wang ,  Chanson Lin ,  Tung-Hsien Wu ,  Chien-Chang Su ,  Gow-Jeng Lin ,  Ching-Chung Hsu ,  Kuang-Yuan Chen

IPC分类号： G06F12/00 ,  G06F12/16

CPC分类号： G06F12/0246

摘要： A flash storage comprises a flash memory, including a plurality of physical memory blocks, each of physical memory blocks comprising a plurality of memory segments, and a plurality of physical sectors, and each of physical sectors being further provided therein with at least a user data column and a logical address pointer column. When physical data is written into the user data column, writing logical address pointer data into the logical address pointer column of the same physical sector may be performed together by the control of a micro-controller. Furthermore, the logical address pointer data in the same memory segment are arranged to be a backup memory segment address mapping table and then stored in one physical memory block. The backup memory segment address mapping table may be loaded directly and stored into a registered memory by the micro-controller when the system boots. Thus, not only shortening the startup duration of the flash storage, but also saving the memory capacity of the registered memory and securing data access may be obtained.

摘要翻译： 闪存存储器包括闪速存储器，其包括多个物理存储器块，每个物理存储器块包括多个存储器段和多个物理扇区，并且每个物理扇区进一步在其中提供至少一个用户数据 列和逻辑地址指针列。 当将物理数据写入用户数据列时，可以通过微控制器的控制将逻辑地址指针数据写入相同物理扇区的逻辑地址指针列中。 此外，同一存储器段中的逻辑地址指针数据被布置为备份存储器段地址映射表，然后存储在一个物理存储块中。 备份存储器段地址映射表可以在系统启动时由微控制器直接加载并存储到注册的存储器中。 因此，不仅可以缩短闪存存储器的启动持续时间，还可以节省注册存储器的存储容量并保护数据访问。

公开(公告)号：US06664859B1

公开(公告)日：2003-12-16

申请号：US10065040

申请日：2002-09-13

申请人： Jen-Ying Chen ,  Gow-Jeng Lin ,  Chien-Ming Chen

发明人： Jen-Ying Chen ,  Gow-Jeng Lin ,  Chien-Ming Chen

IPC分类号： H03L700

CPC分类号： H04L7/0331 ,  H03L7/08

摘要： A single mode state machine for recovering the Universal Serial Bus (USB) clock from the USB. The claimed state machine running at 4X speed includes only five states and generates a 1X speed clock. When transmitting, the claimed invention acts as a divide-by-four counter and divides the 4X clock into a 1X clock to be used by control logic (for example, a Serial Interface Engine). When receiving, the same state group acts as a divide-by-four counter with the received data's status being continuously monitored to reset the state machine to an original state to dynamically adjust the duty cycle of the receiving clock. The exact selection of transition path is determined by the logical AND of a phase change within the data and a signal indicating whether the state machine is currently transmitting or receiving.

摘要翻译： 用于从USB恢复通用串行总线（USB）时钟的单模状态机。 以4X速度运行的所要求保护的状态机只包括五个状态，并生成1X速度时钟。 当发送时，要求保护的发明用作四分频计数器，并将4X时钟分为1X时钟，以供控制逻辑（例如串行接口引擎）使用。 当接收时，相同的状态组作为四分之一计数器，其中接收到的数据的状态被连续监视，以将状态机重置为原始状态，以动态调整接收时钟的占空比。 过渡路径的确切选择由数据内的相位变化的逻辑“与”和表示状态机当前正在发送或接收的信号确定。