公开(公告)号：US10257264B1

公开(公告)日：2019-04-09

申请号：US15438419

申请日：2017-02-21

Applicant: YuMe Inc.

Inventor： Ayyappan Sankaran ,  Priya Wasnikar ,  Ayusman Sarangi

IPC: H04L12/26 ,  H04L29/08 ,  G06F12/0813 ,  G06F12/0862

Abstract: A system for reducing data center latency including a webserver having a processor, a memory system controller, external memory, cache memory including a plurality of cache blocks, where each cache block includes provider parameters and at least one user identifier (ID), and program memory including code segments executable by the processor. In an embodiment, the webserver receives a request sent by a requestor having requestor parameters including at least a requestor ID and a user ID, identifies a predictive cache block set; formulates a reply based, at least in part, upon a probability that a number of replies associated with a user ID of the predictive cache block set will exceed a frequency floor number within a predetermined period of time; and sends the reply to the requestor.