公开(公告)号：US08094024B2

公开(公告)日：2012-01-10

申请号：US12500790

申请日：2009-07-10

申请人： Yuan-Jiang Lee ,  Yueh-Hua Yu ,  Yi-Jan Chen ,  Yu-Hsuan Li

发明人： Yuan-Jiang Lee ,  Yueh-Hua Yu ,  Yi-Jan Chen ,  Yu-Hsuan Li

IPC分类号： G08B13/14 ,  H03D1/18

CPC分类号： H03D1/18

摘要： An exemplary amplitude shift keying (ASM) demodulator and a radio frequency identification (RFID) system using the same are provided. The ASM demodulator is adapted to demodulate an alternating current input signal and generate a demodulated envelope signal. The ASM demodulator includes a signal input terminal group, an input rectifier circuit, a current mirror circuit electrically coupled to the input rectifier circuit, an output stage electrically coupled to the current mirror circuit, and a low pass filter electrically coupled to the output stage. The input rectifier circuit is electrically coupled to the signal input terminal group and adapted to perform a rectifying operation applied to the alternating current input signal. The input rectifier circuit includes a plurality of electrically coupled transistors and a gate electrode of each of the transistors is unconnected with a source electrode and a drain electrode itself.

摘要翻译： 提供了示例性的幅度移位键控（ASM）解调器和使用其的射频识别（RFID）系统。 ASM解调器适于解调交流输入信号并产生解调的包络信号。 ASM解调器包括信号输入端子组，输入整流电路，电耦合到输入整流器电路的电流镜电路，电耦合到电流镜电路的输出级和电耦合到输出级的低通滤波器。 输入整流电路电耦合到信号输入端子组，并且适于执行施加到交流输入信号的整流操作。 输入整流电路包括多个电耦合晶体管，并且每个晶体管的栅电极与源极和漏电极本身不连接。

公开(公告)号：US20100164724A1

公开(公告)日：2010-07-01

申请号：US12500790

申请日：2009-07-10

申请人： Yuan-Jiang Lee ,  Yueh-Hua Yu ,  Yi-Jan Chen ,  Yu-Hsuan Li

发明人： Yuan-Jiang Lee ,  Yueh-Hua Yu ,  Yi-Jan Chen ,  Yu-Hsuan Li

IPC分类号： G08B13/14 ,  H03D1/18

CPC分类号： H03D1/18

摘要： An exemplary amplitude shift keying (ASM) demodulator and a radio frequency identification (RFID) system using the same are provided. The ASM demodulator is adapted to demodulate an alternating current input signal and generate a demodulated envelope signal. The ASM demodulator includes a signal input terminal group, an input rectifier circuit, a current mirror circuit electrically coupled to the input rectifier circuit, an output stage electrically coupled to the current mirror circuit, and a low pass filter electrically coupled to the output stage. The input rectifier circuit is electrically coupled to the signal input terminal group and adapted to perform a rectifying operation applied to the alternating current input signal. The input rectifier circuit includes a plurality of electrically coupled transistors and a gate electrode of each of the transistors is unconnected with a source electrode and a drain electrode itself.

摘要翻译： 提供了示例性的幅度移位键控（ASM）解调器和使用其的射频识别（RFID）系统。 ASM解调器适于解调交流输入信号并产生解调的包络信号。 ASM解调器包括信号输入端子组，输入整流电路，电耦合到输入整流器电路的电流镜电路，电耦合到电流镜电路的输出级和电耦合到输出级的低通滤波器。 输入整流电路电耦合到信号输入端子组，并且适于执行施加到交流输入信号的整流操作。 输入整流电路包括多个电耦合晶体管，并且每个晶体管的栅电极与源极和漏电极本身不连接。

公开(公告)号：US08693967B2

公开(公告)日：2014-04-08

申请号：US13073996

申请日：2011-03-28

申请人： Chi-Wei Cheng ,  Yueh-Hua Yu ,  Yi-Jan Chen

发明人： Chi-Wei Cheng ,  Yueh-Hua Yu ,  Yi-Jan Chen

IPC分类号： H04B1/18

CPC分类号： H04B1/0053 ,  H04B1/0007

摘要： A receiver of a GNSS system is provided. The receiver comprises two mixers and a processing circuit. The first mixer down-converts an input radio-frequency signal comprising a first GNSS signal and a second GNSS signal into a first low-frequency signal. The second mixer down-converts the input radio-frequency signal into a second low-frequency signal. The processing circuit generates at least one phase-shifted low-frequency signal according to at least the first low-frequency signal, extract signal components of the first GNSS signal by rejecting signal components of the second GNSS signal according to the second low-frequency signal and the at least one phase-shifted low-frequency signal, and extract signal components of the second GNSS signal by rejecting signal components of the first GNSS signal according to the second low-frequency signal and the at least one phase-shifted low-frequency signal. The first and second GNSS signals are situated in different frequency ranges.

摘要翻译： 提供GNSS系统的接收机。 接收机包括两个混频器和一个处理电路。 第一混频器将包括第一GNSS信号和第二GNSS信号的输入射频信号下变频为第一低频信号。 第二混频器将输入射频信号下变频为第二低频信号。 处理电路根据至少第一低频信号产生至少一个相移低频信号，通过根据第二低频信号拒绝第二GNSS信号的信号分量来提取第一GNSS信号的信号分量 和所述至少一个相移低频信号，并且通过根据所述第二低频信号和所述至少一个相移低频信号拒绝所述第一GNSS信号的信号分量来提取所述第二GNSS信号的信号分量 信号。 第一和第二GNSS信号位于不同的频率范围内。

公开(公告)号：US20120252395A1

公开(公告)日：2012-10-04

申请号：US13073996

申请日：2011-03-28

申请人： Chi-Wei Cheng ,  Yueh-Hua Yu ,  Yi-Jan Chen

发明人： Chi-Wei Cheng ,  Yueh-Hua Yu ,  Yi-Jan Chen

IPC分类号： H04B1/26

CPC分类号： H04B1/0053 ,  H04B1/0007

摘要： A receiver of a GNSS system is provided. The receiver comprises two mixers and a processing circuit. The first mixer down-converts an input radio-frequency signal comprising a first GNSS signal and a second GNSS signal into a first low-frequency signal. The second mixer down-converts the input radio-frequency signal into a second low-frequency signal. The processing circuit generates at least one phase-shifted low-frequency signal according to at least the first low-frequency signal, extract signal components of the first GNSS signal by rejecting signal components of the second GNSS signal according to the second low-frequency signal and the at least one phase-shifted low-frequency signal, and extract signal components of the second GNSS signal by rejecting signal components of the first GNSS signal according to the second low-frequency signal and the at least one phase-shifted low-frequency signal. The first and second GNSS signals are situated in different frequency ranges.

摘要翻译： 提供GNSS系统的接收机。 接收机包括两个混频器和一个处理电路。 第一混频器将包括第一GNSS信号和第二GNSS信号的输入射频信号下变频为第一低频信号。 第二混频器将输入射频信号下变频为第二低频信号。 处理电路根据至少第一低频信号产生至少一个相移低频信号，通过根据第二低频信号拒绝第二GNSS信号的信号分量来提取第一GNSS信号的信号分量 和所述至少一个相移低频信号，并且通过根据所述第二低频信号和所述至少一个相移低频信号拒绝所述第一GNSS信号的信号分量来提取所述第二GNSS信号的信号分量 信号。 第一和第二GNSS信号位于不同的频率范围内。

公开(公告)号：US08093928B2

公开(公告)日：2012-01-10

申请号：US12395851

申请日：2009-03-02

申请人： Chih Wei Chang ,  Yi-Jan Chen

发明人： Chih Wei Chang ,  Yi-Jan Chen

IPC分类号： H03K27/00

CPC分类号： H03K3/0315 ,  H03K19/018528

摘要： A signal source device is provided and includes a plurality of latch units, an inverter unit, and a voltage-shifting unit, which may include a capacitance unit. The plurality of latch units are substantially cascaded. The inverter unit is coupled to the latch units. The voltage-shifting unit has a first terminal coupled to the inverter unit and one of the latch units and a second terminal receiving a first input signal, for shifting a voltage level at the first terminal according to the first input signal.

摘要翻译： 提供信号源装置，并且包括多个闩锁单元，逆变器单元和电压移位单元，其可以包括电容单元。 多个闩锁单元基本上是级联的。 逆变器单元耦合到闩锁单元。 电压移位单元具有耦合到逆变器单元的第一端子和锁存单元中的一个以及接收第一输入信号的第二端子，用于根据第一输入信号移位第一端子处的电压电平。

公开(公告)号：US20080143444A1

公开(公告)日：2008-06-19

申请号：US11808678

申请日：2007-06-12

申请人： Zhi-Yuan Liu ,  Yi-Jan Chen

发明人： Zhi-Yuan Liu ,  Yi-Jan Chen

IPC分类号： H03F3/04

CPC分类号： H03F1/0266 ,  H03F1/0288

摘要： A bias circuit includes a transistor having a control gate, a first terminal and a second terminal coupled to a ground level, a first resistor coupled to the control gate, a first capacitor coupled between an input signal and the first resistor, a diode coupled between a connection point of the first capacitor and the first resistor, and the ground level, a second capacitor coupled between the control gate and the ground level, a second resistor coupled between the control gate and the ground level, a third resistor coupled between the control gate and a predetermined voltage, a fourth resistor coupled between the predetermined voltage and the first terminal, and a fifth resistor coupled between the first terminal and a bias signal. A current through the transistor corresponds to the input signal, and the bias signal is generated according to the current through the transistor.

摘要翻译： 偏置电路包括具有控制栅极，耦合到地电平的第一端子和第二端子的晶体管，耦合到控制栅极的第一电阻器，耦合在输入信号和第一电阻器之间的第一电容器， 第一电容器和第一电阻器的连接点和地电平，耦合在控制栅极和地电平之间的第二电容器，耦合在控制栅极和地电平之间的第二电阻器，耦合在控制栅极和地电平之间的第三电阻器， 栅极和预定电压，耦合在预定电压和第一端子之间的第四电阻器，以及耦合在第一端子和偏置信号之间的第五电阻器。 通过晶体管的电流对应于输入信号，并且根据通过晶体管的电流产生偏置信号。

公开(公告)号：US20100219873A1

公开(公告)日：2010-09-02

申请号：US12395851

申请日：2009-03-02

申请人： Chih Wei Chang ,  Yi-Jan Chen

发明人： Chih Wei Chang ,  Yi-Jan Chen

IPC分类号： H03L5/00

CPC分类号： H03K3/0315 ,  H03K19/018528

摘要： A signal source device is provided and includes a plurality of latch units, an inverter unit, and a voltage-shifting unit, which may include a capacitance unit. The plurality of latch units are substantially cascaded. The inverter unit is coupled to the latch units. The voltage-shifting unit has a first terminal coupled to the inverter unit and one of the latch units and a second terminal receiving a first input signal, for shifting a voltage level at the first terminal according to the first input signal.

摘要翻译： 提供信号源装置，并且包括多个闩锁单元，逆变器单元和电压移位单元，其可以包括电容单元。 多个闩锁单元基本上是级联的。 逆变器单元耦合到闩锁单元。 电压移位单元具有耦合到逆变器单元的第一端子和锁存单元中的一个以及接收第一输入信号的第二端子，用于根据第一输入信号移位第一端子处的电压电平。

公开(公告)号：US07525388B2

公开(公告)日：2009-04-28

申请号：US11808678

申请日：2007-06-12

申请人： Zhi-Yuan Liu ,  Yi-Jan Chen

发明人： Zhi-Yuan Liu ,  Yi-Jan Chen

IPC分类号： H03F3/04

CPC分类号： H03F1/0266 ,  H03F1/0288

摘要： A bias circuit includes a transistor having a control gate, a first terminal and a second terminal coupled to a ground level, a first resistor coupled to the control gate, a first capacitor coupled between an input signal and the first resistor, a diode coupled between a connection point of the first capacitor and the first resistor, and the ground level, a second capacitor coupled between the control gate and the ground level, a second resistor coupled between the control gate and the ground level, a third resistor coupled between the control gate and a predetermined voltage, a fourth resistor coupled between the predetermined voltage and the first terminal, and a fifth resistor coupled between the first terminal and a bias signal. A current through the transistor corresponds to the input signal, and the bias signal is generated according to the current through the transistor.

摘要翻译： 偏置电路包括具有控制栅极，耦合到地电平的第一端子和第二端子的晶体管，耦合到控制栅极的第一电阻器，耦合在输入信号和第一电阻器之间的第一电容器， 第一电容器和第一电阻器的连接点和地电平，耦合在控制栅极和地电平之间的第二电容器，耦合在控制栅极和地电平之间的第二电阻器，耦合在控制栅极和地电平之间的第三电阻器， 栅极和预定电压，耦合在预定电压和第一端子之间的第四电阻器，以及耦合在第一端子和偏置信号之间的第五电阻器。 通过晶体管的电流对应于输入信号，并且根据通过晶体管的电流产生偏置信号。