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公开(公告)号：US08117360B2
公开(公告)日：2012-02-14
申请号：US11714741
申请日：2007-03-07
CPC分类号： G06F13/126
摘要： An on-vehicle electronic control device 100A serially transmits A/D conversion data of plural channels from a second control circuit unit 300A including a multichannel A/D converter 204A to a microprocessor 110A disposed in a first control circuit unit 200A. The A/D conversion data are organized into a communication packet and transmitted via first and second buffer memories 204b and 204d, and when there is an abnormality in the A/D conversion data, transfer between the first and second buffer memories 204b and 204d is prohibited and an abnormality report is performed with respect to the microprocessor 110A. As a result, erroneous data are not transmitted, and communication congestion and the burden of the microprocessor 110A are alleviated.
摘要翻译： 车载电子控制装置100A将多通道的A / D转换数据从包括多通道A / D转换器204A的第二控制电路单元300A串行发送到设置在第一控制电路单元200A中的微处理器110A。 A / D转换数据被组织成通信分组并通过第一和第二缓冲存储器204b和204d发送，并且当A / D转换数据出现异常时，第一和第二缓冲存储器204b和204d之间的传送是 并且相对于微处理器110A执行异常报告。 结果，不发送错误的数据，并且缓解了通信拥塞和微处理器110A的负担。
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公开(公告)号：US20080071949A1
公开(公告)日：2008-03-20
申请号：US11714741
申请日：2007-03-07
IPC分类号： G06F13/38
CPC分类号： G06F13/126
摘要： An on-vehicle electronic control device 100A serially transmits A/D conversion data of plural channels from a second control circuit unit 300A including a multichannel A/D converter 204A to a microprocessor 110A disposed in a first control circuit unit 200A. The A/D conversion data are organized into a communication packet and transmitted via first and second buffer memories 204b and 204d, and when there is an abnormality in the A/D conversion data, transfer between the first and second buffer memories 204b and 204d is prohibited and an abnormality report is performed with respect to the microprocessor 110A. As a result, erroneous data are not transmitted, and communication congestion and the burden of the microprocessor 110A are alleviated.
摘要翻译： 车载电子控制装置100A从包括多通道A / D转换器204A的第二控制电路单元300A向设置在第一控制电路单元200A中的微处理器110A串行地发送多个通道的A / D转换数据 A / D转换数据被组织成通信分组并通过第一和第二缓冲存储器204b和204d发送，当A / D转换数据出现异常时，第一和第二缓冲存储器204之间的传送 b和204d被禁止，并且相对于微处理器110A执行异常报告。结果，不发送错误数据，并且减轻了通信拥塞和微处理器110A的负担。
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公开(公告)号：US20060089756A1
公开(公告)日：2006-04-27
申请号：US11205190
申请日：2005-08-17
申请人： Yuki Iwagami , Junya Tanaka , Manabu Yamashita , Kohji Hashimoto
发明人： Yuki Iwagami , Junya Tanaka , Manabu Yamashita , Kohji Hashimoto
IPC分类号： G06F17/00
CPC分类号： H04L12/2854
摘要： A first control circuit portion carries out input/output control in cooperation with a microprocessor, a program memory, and a RAM memory. A second control circuit portion is in cooperation with the communication control circuit portion and the data memory to carry out serial communication with the first control circuit portion. A switch signal input to the second control circuit portion is stored in a first report packet, a digital conversion value for an analog signal input is stored in a second report packet, and the first and second packets are alternately periodically transmitted to the first control circuit portion. A multi-channel AD converter included in an analog signal input circuit starts to carry out AD conversion a prescribed time period after a first report packet is transmitted and finishes conversion before a second report packet is transmitted, so that up-to-date AD conversion data is transmitted.
摘要翻译： 第一控制电路部分与微处理器，程序存储器和RAM存储器协同执行输入/输出控制。 第二控制电路部分与通信控制电路部分和数据存储器协同进行与第一控制电路部分的串行通信。 输入到第二控制电路部分的开关信号被存储在第一报告分组中，用于模拟信号输入的数字转换值被存储在第二报告分组中，并且第一和第二分组被交替周期地发送到第一控制电路 一部分。 包含在模拟信号输入电路中的多通道AD转换器在发送第一报告分组之后的规定时间段开始执行AD转换，并且在发送第二报告分组之前完成转换，使得最新的AD转换 数据传输。
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公开(公告)号：US07467036B2
公开(公告)日：2008-12-16
申请号：US11205190
申请日：2005-08-17
申请人： Yuki Iwagami , Junya Tanaka , Manabu Yamashita , Kohji Hashimoto
发明人： Yuki Iwagami , Junya Tanaka , Manabu Yamashita , Kohji Hashimoto
IPC分类号： G06F7/00
CPC分类号： H04L12/2854
摘要： A first control circuit portion carries out input/output control in cooperation with a microprocessor, a program memory, and a RAM memory. A second control circuit portion is in cooperation with the communication control circuit portion and the data memory to carry out serial communication with the first control circuit portion. A switch signal input to the second control circuit portion is stored in a first report packet, a digital conversion value for an analog signal input is stored in a second report packet, and the first and second packets are alternately periodically transmitted to the first control circuit portion. A multi-channel AD converter included in an analog signal input circuit starts to carry out AD conversion a prescribed time period after a first report packet is transmitted and finishes conversion before a second report packet is transmitted, so that up-to-date AD conversion data is transmitted.
摘要翻译： 第一控制电路部分与微处理器，程序存储器和RAM存储器协同执行输入/输出控制。 第二控制电路部分与通信控制电路部分和数据存储器协同进行与第一控制电路部分的串行通信。 输入到第二控制电路部分的开关信号被存储在第一报告分组中，用于模拟信号输入的数字转换值被存储在第二报告分组中，并且第一和第二分组被交替周期地发送到第一控制电路 一部分。 包含在模拟信号输入电路中的多通道AD转换器在发送第一报告分组之后的规定时间段开始执行AD转换，并且在发送第二报告分组之前完成转换，使得最新的AD转换 数据传输。
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5.发明申请公开(公告)号：US20090138137A1
公开(公告)日：2009-05-28
申请号：US12118279
申请日：2008-05-09
申请人： Yuki Iwagami , Manabu Yamashita , Koji Hashimoto
发明人： Yuki Iwagami , Manabu Yamashita , Koji Hashimoto
IPC分类号： G06F17/00
CPC分类号： G05B9/02 , G06F11/0739 , G06F11/0751
摘要： An in-vehicle electronic control apparatus having a monitoring control circuit is configured in such a way that a monitoring control circuit unit transmits question information from a logic circuit unit; a main control circuit transmits answer information generated by a microprocessor; the monitoring control circuit unit applies an addition and subtraction correction to the value of a first present-value memory by use of a first and fourth variation values Δ1 and Δ4, in response to the result of a comparison between correct-solution information stored in a data memory and the answer information; and when the accumulated present value exceeds an abnormality determination threshold value Nj, the monitoring control circuit unit generates a first abnormality detection signal so as to initialize and restart the microprocessor, and variably sets the abnormality determination threshold value Nj or an abnormality determination time, based on selection information obtained through a printed patter
摘要翻译： 具有监视控制电路的车载电子控制装置被配置为使得监视控制电路单元从逻辑电路单元发送问题信息; 主控制电路发送由微处理器产生的应答信息; 监视控制电路单元响应于存储在第一和第三变量值的第一和第四变化值Delta1和Delta4之间的正确解决信息的比较结果，对第一存在值存储器的值进行加法和减法校正 数据存储器和答案信息; 并且当累积当前值超过异常判定阈值Nj时，监视控制电路单元产生第一异常检测信号，以初始化并重启微处理器，并且基于该异常判定阈值Nj或异常判定时间可变地设定 关于通过印刷图案获得的选择信息
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6.发明授权公开(公告)号：US08234035B2
公开(公告)日：2012-07-31
申请号：US12118279
申请日：2008-05-09
申请人： Yuki Iwagami , Manabu Yamashita , Koji Hashimoto
发明人： Yuki Iwagami , Manabu Yamashita , Koji Hashimoto
CPC分类号： G05B9/02 , G06F11/0739 , G06F11/0751
摘要： An in-vehicle electronic control apparatus includes a monitoring control circuit configured such that a monitoring control circuit unit transmits question information; a main control circuit unit transmits answer information generated by a microprocessor; the monitoring control circuit unit applies an addition and subtraction correction to a value of a first present-value memory in response to a result of a comparison between correct-solution information stored in a data memory and the answer information; and when the accumulated present value exceeds an abnormality determination threshold value, the monitoring control circuit unit generates a first abnormality detection signal so as to initialize and restart the microprocessor, and variably sets the abnormality determination threshold value or an abnormality determination time, based on selectively applied setting constants generated with pattern switches.
摘要翻译： 车载电子控制装置包括监视控制电路，其被配置为使得监视控制电路单元发送问题信息; 主控制电路单元发送由微处理器产生的应答信息; 响应于存储在数据存储器中的解决方案信息与答案信息之间的比较结果，监视控制电路单元对第一当值存储器的值进行加法和减法校正; 并且当累计当前值超过异常判定阈值时，监视控制电路单元产生第一异常检测信号，以便初始化和重新启动微处理器，并且基于选择性地可变地设置异常判定阈值或异常确定时间 应用设置常数用模式开关生成。
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公开(公告)号：US20080309163A1
公开(公告)日：2008-12-18
申请号：US12132275
申请日：2008-06-03
申请人： Koji Hashimoto , Yuki Iwagami , Manabu Yamashita
发明人： Koji Hashimoto , Yuki Iwagami , Manabu Yamashita
CPC分类号： H02J7/0029 , B60R16/02 , H02J2001/008 , H02M2001/009 , Y10T307/406
摘要： In an in-vehicle mount electronic controller, a constant-voltage power supply generates a high-precision small-capacity 5V output voltage Vad, a low-precision large-capacity 5V output voltage Vif and a low-precision large-capacity 3.3V output voltage Vcp, and also generates at least one of a low-precision small-capacity 2.8V output voltage Vup and a high-precision small-capacity 3.3V output voltage Vsb. A judgment signal input circuit logically combines comparison results of divided voltages of the above output voltages Vif, Vcp, Vup and Vsb with a divided voltage of the output voltage Vad as a reference voltage, and inputs relative voltage information ER2, ER3, ER4 and ER5 to a microprocessor. The microprocessor comprehensively judges the output voltages containing the comparison reference voltage, and reports abnormality or saves abnormality occurrence information.
摘要翻译： 在车载电子控制器中，恒压电源产生高精度小容量5V输出电压Vad，低精度大容量5V输出电压Vif和低精度大容量3.3V输出 电压Vcp，并且还产生低精度小容量2.8V输出电压Vup和高精度小容量3.3V输出电压Vsb中的至少一个。 判断信号输入电路将上述输出电压Vif，Vcp，Vup，Vsb的分压的比较结果与输出电压Vad的分压作为基准电压进行逻辑结合，输入相对电压信息ER2，ER3，ER4，ER5 到微处理器。 微处理器综合地判断包含比较参考电压的输出电压，并且报告异常或者保存异常发生信息。
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公开(公告)号：US08994220B2
公开(公告)日：2015-03-31
申请号：US13343804
申请日：2012-01-05
CPC分类号： B60R16/00
摘要： In a vehicle-mounted electronic control device having a switching power supply in which a switching element is controlled to obtain a predetermined intermediate voltage Va stepped down from a vehicle-mounted battery, and to which a downstream side coil, a flywheel diode, and an output capacitor are connected to suppress a pulsating voltage, a circuit for suppressing reverse conduction for the switching element is provided in order to prevent that the switching element is reversely conducted and thus a charging voltage of the output capacitor is abnormally lowered when a power supply voltage Vb of the vehicle-mounted battery is abnormally lowered.
摘要翻译： 在具有开关电源的车载电子控制装置中，其中开关元件被控制以获得从车载电池下降的预定中间电压Va，并且下游侧线圈，续流二极管和 连接输出电容器以抑制脉动电压，为了防止开关元件反向导通，设置用于抑制反向导通的电路，因此当电源电压为0V时，输出电容器的充电电压异常降低 车载电池的Vb异常地下降。
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公开(公告)号：US08321063B2
公开(公告)日：2012-11-27
申请号：US12873727
申请日：2010-09-01
申请人： Yuki Iwagami , Koji Hashimoto , Manabu Yamashita
发明人： Yuki Iwagami , Koji Hashimoto , Manabu Yamashita
IPC分类号： G06F1/28
CPC分类号： G06F1/28
摘要： An electronic control apparatus is provided in which a supervisory control circuit part capable of mutual communication with a main control circuit part, which is operated by a high speed clock signal of high precision, is operated by a medium speed clock signal, which is low in cost and precision, such that they can operate mutually independently of each other. The main control circuit part supplies a medium speed communication synchronization signal frequency divided to the supervisory control circuit part. The supervisory control circuit part is operated by the medium speed clock signal to supervise the control operation of the main control circuit part. An error measuring circuit calculates an error correction coefficient which is the ratio of the signal cycle of the communication synchronization signal to that of the medium speed clock signal. The value of the error correction coefficient is reversely supervised by the main control circuit part.
摘要翻译： 提供了一种电子控制装置，其中能够通过高精度的高速时钟信号操作的主控制电路部分相互通信的监控电路部分由低速时钟信号 成本和精度，使得它们可以彼此独立地相互操作。 主控制电路部分提供分频到监控电路部分的中速通信同步信号频率。 监控电路部分由中速时钟信号进行操作，以监控主控电路部分的控制操作。 误差测量电路计算作为通信同步信号的信号周期与中速时钟信号的信号周期之比的误差校正系数。 误差校正系数的值由主控制电路部分反向监督。
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公开(公告)号：US07719134B2
公开(公告)日：2010-05-18
申请号：US12132275
申请日：2008-06-03
申请人： Koji Hashimoto , Yuki Iwagami , Manabu Yamashita
发明人： Koji Hashimoto , Yuki Iwagami , Manabu Yamashita
CPC分类号： H02J7/0029 , B60R16/02 , H02J2001/008 , H02M2001/009 , Y10T307/406
摘要： In an in-vehicle mount electronic controller, a constant-voltage power supply generates a high-precision small-capacity 5V output voltage Vad, a low-precision large-capacity 5V output voltage Vif and a low-precision large-capacity 3.3V output voltage Vcp, and also generates at least one of a low-precision small-capacity 2.8V output voltage Vup and a high-precision small-capacity 3.3V output voltage Vsb. A judgment signal input circuit logically combines comparison results of divided voltages of the above output voltages Vif, Vcp, Vup and Vsb with a divided voltage of the output voltage Vad as a reference voltage, and inputs relative voltage information ER2, ER3, ER4 and ER5 to a microprocessor. The microprocessor comprehensively judges the output voltages containing the comparison reference voltage, and reports abnormality or saves abnormality occurrence information.
摘要翻译： 在车载电子控制器中，恒压电源产生高精度小容量5V输出电压Vad，低精度大容量5V输出电压Vif和低精度大容量3.3V输出 电压Vcp，并且还产生低精度小容量2.8V输出电压Vup和高精度小容量3.3V输出电压Vsb中的至少一个。 判断信号输入电路将上述输出电压Vif，Vcp，Vup，Vsb的分压的比较结果与输出电压Vad的分压作为基准电压进行逻辑结合，输入相对电压信息ER2，ER3，ER4，ER5 到微处理器。 微处理器综合地判断包含比较参考电压的输出电压，并且报告异常或者保存异常发生信息。
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