Firmware processing for downlink F-DPCH
    1.
    发明授权
    Firmware processing for downlink F-DPCH 失效
    下行链路F-DPCH的固件处理

    公开(公告)号:US08437315B2

    公开(公告)日:2013-05-07

    申请号:US11963457

    申请日:2007-12-21

    IPC分类号: H04B7/216

    摘要: A downlink channel receiver operable to implement fractional dedicated physical channel (F-DPCH) processing within a Rake receiver structure is provided. The downlink channel receiver includes a receiver, a baseband processing block, a WCDMA processing block, wherein F-DPCH processing is divided between a plurality of hardware processing blocks and a plurality of firmware (FW) processing blocks. The receiver is operable to convert a radio frequency (RF) signal to a baseband signal. The baseband processing block operable to processes and provides the baseband signal to the WCDMA processing block. F-DPCH processing is divided between the plurality of hardware processing blocks and plurality of firmware (FW) processing blocks.

    摘要翻译: 提供了一种用于在Rake接收机结构内实现小数专用物理信道(F-DPCH)处理的下行链路信道接收机。 下行链路信道接收机包括接收机,基带处理块,WCDMA处理块,其中,在多个硬件处理块和多个固件(FW)处理块之间划分F-DPCH处理。 接收器可操作以将射频(RF)信号转换为基带信号。 基带处理块可操作以处理并向WCDMA处理块提供基带信号。 在多个硬件处理块和多个固件(FW)处理块之间划分F-DPCH处理。

    FIRMWARE PROCESSING FOR DOWNLINK F-DPCH
    2.
    发明申请
    FIRMWARE PROCESSING FOR DOWNLINK F-DPCH 失效
    用于下行链路F-DPCH的固件处理

    公开(公告)号:US20090034502A1

    公开(公告)日:2009-02-05

    申请号:US11963457

    申请日:2007-12-21

    IPC分类号: H04J13/02

    摘要: A downlink channel receiver operable to implement fractional dedicated physical channel (F-DPCH) processing within a Rake receiver structure is provided. The downlink channel receiver includes a receiver, a baseband processing block, a WCDMA processing block, wherein F-DPCH processing is divided between a plurality of hardware processing blocks and a plurality of firmware (FW) processing blocks. The receiver is operable to convert a radio frequency (RF) signal to a baseband signal. The baseband processing block operable to processes and provides the baseband signal to the WCDMA processing block. F-DPCH processing is divided between the plurality of hardware processing blocks and plurality of firmware (FW) processing blocks.

    摘要翻译: 提供了一种用于在Rake接收机结构内实现小数专用物理信道(F-DPCH)处理的下行链路信道接收机。 下行链路信道接收机包括接收机,基带处理块,WCDMA处理块,其中,在多个硬件处理块和多个固件(FW)处理块之间划分F-DPCH处理。 接收器可操作以将射频(RF)信号转换为基带信号。 基带处理块可操作以处理并向WCDMA处理块提供基带信号。 在多个硬件处理块和多个固件(FW)处理块之间划分F-DPCH处理。

    METHOD AND APPARATUS TO COMPUTE A NOISE POWER ESTIMATE IN A WCDMA NETWORK BASED ON DEDICATED PHYSICAL CONTROL CHANNEL (DPCCH) PROCESSING
    3.
    发明申请
    METHOD AND APPARATUS TO COMPUTE A NOISE POWER ESTIMATE IN A WCDMA NETWORK BASED ON DEDICATED PHYSICAL CONTROL CHANNEL (DPCCH) PROCESSING 有权
    基于专用物理控制信道(DPCCH)处理的WCDMA网络中噪声功率估计的方法和装置

    公开(公告)号:US20090034598A1

    公开(公告)日:2009-02-05

    申请号:US11935841

    申请日:2007-11-06

    IPC分类号: H04B17/00

    摘要: A method to process DP bits within a WCDMA receiver where a noise estimation that may be implemented within hardware is provided for improved flexibility and performance. DPCH pilot symbols are received, quantized, channel compensated and combined. The computation of an SNR estimate based on the combined DPCH pilot symbols is provided. Noise estimation is used as part of the SNR estimation of the DP bits (used for downlink power control). This method does not rely on the assumption that the channel is constant over the DP field, while prior methods did.

    摘要翻译: 一种处理WCDMA接收机内的DP位的方法,其中可以在硬件内实现噪声估计,以提高灵活性和性能。 DPCH导频符号被接收,量化,信道补偿和组合。 提供了基于组合DPCH导频符号的SNR估计的计算。 噪声估计被用作DP位的SNR估计的一部分(用于下行链路功率控制)。 该方法不依赖于在DP字段上信道是恒定的假设,而先前的方法是。

    Method and apparatus to compute a noise power estimate in a WCDMA network based on dedicated physical control channel (DPCCH) processing
    4.
    发明授权
    Method and apparatus to compute a noise power estimate in a WCDMA network based on dedicated physical control channel (DPCCH) processing 有权
    基于专用物理控制信道(DPCCH)处理来计算WCDMA网络中的噪声功率估计的方法和装置

    公开(公告)号:US08014438B2

    公开(公告)日:2011-09-06

    申请号:US11935841

    申请日:2007-11-06

    IPC分类号: H04B1/00

    摘要: A method to process DP bits within a WCDMA receiver where a noise estimation that may be implemented within hardware is provided for improved flexibility and performance. DPCH pilot symbols are received, quantized, channel compensated and combined. The computation of an SNR estimate based on the combined DPCH pilot symbols is provided. Noise estimation is used as part of the SNR estimation of the DP bits (used for downlink power control). This method does not rely on the assumption that the channel is constant over the DP field, while prior methods did.

    摘要翻译: 一种在WCDMA接收机内处理DP位的方法,其中可以在硬件内实现噪声估计,以提高灵活性和性能。 DPCH导频符号被接收,量化,信道补偿和组合。 提供了基于组合DPCH导频符号的SNR估计的计算。 噪声估计被用作DP位的SNR估计的一部分(用于下行链路功率控制)。 该方法不依赖于在DP字段上信道是恒定的假设,而先前的方法是。