摘要:
A downlink channel receiver operable to implement fractional dedicated physical channel (F-DPCH) processing within a Rake receiver structure is provided. The downlink channel receiver includes a receiver, a baseband processing block, a WCDMA processing block, wherein F-DPCH processing is divided between a plurality of hardware processing blocks and a plurality of firmware (FW) processing blocks. The receiver is operable to convert a radio frequency (RF) signal to a baseband signal. The baseband processing block operable to processes and provides the baseband signal to the WCDMA processing block. F-DPCH processing is divided between the plurality of hardware processing blocks and plurality of firmware (FW) processing blocks.
摘要:
A downlink channel receiver operable to implement fractional dedicated physical channel (F-DPCH) processing within a Rake receiver structure is provided. The downlink channel receiver includes a receiver, a baseband processing block, a WCDMA processing block, wherein F-DPCH processing is divided between a plurality of hardware processing blocks and a plurality of firmware (FW) processing blocks. The receiver is operable to convert a radio frequency (RF) signal to a baseband signal. The baseband processing block operable to processes and provides the baseband signal to the WCDMA processing block. F-DPCH processing is divided between the plurality of hardware processing blocks and plurality of firmware (FW) processing blocks.
摘要:
A method to process DP bits within a WCDMA receiver where a noise estimation that may be implemented within hardware is provided for improved flexibility and performance. DPCH pilot symbols are received, quantized, channel compensated and combined. The computation of an SNR estimate based on the combined DPCH pilot symbols is provided. Noise estimation is used as part of the SNR estimation of the DP bits (used for downlink power control). This method does not rely on the assumption that the channel is constant over the DP field, while prior methods did.
摘要:
A method to process DP bits within a WCDMA receiver where a noise estimation that may be implemented within hardware is provided for improved flexibility and performance. DPCH pilot symbols are received, quantized, channel compensated and combined. The computation of an SNR estimate based on the combined DPCH pilot symbols is provided. Noise estimation is used as part of the SNR estimation of the DP bits (used for downlink power control). This method does not rely on the assumption that the channel is constant over the DP field, while prior methods did.