公开(公告)号：US09429972B2

公开(公告)日：2016-08-30

申请号：US14181563

申请日：2014-02-14

Applicant: ams AG

Inventor： Carlo Fiocchi ,  Paolo Draghi

IPC: G05F1/575 ,  G05F1/565 ,  G05F1/10

CPC classification number: G05F1/575 ,  G05F1/10 ,  G05F1/565

Abstract: A low dropout regulator comprises an output transistor with a controlled section between a first supply terminal and an output terminal, and a differential amplifier comprising a feedback input coupled to the output terminal, a reference input receiving a reference voltage, an output connected to a control terminal of the output transistor, and a pair of input transistors connected to a tail current source. A control terminal of a first transistor is connected to the reference input. A control terminal of a second transistor is connected to the feedback input. A first capacitive element is coupled between the output terminal and common connection of the input transistors of one pair with their tail current source. A second capacitive element is coupled between a second supply terminal and the common connection of the input transistors of one pair with their tail current source.

Abstract translation: 低压降稳压器包括具有在第一电源端子和输出端子之间的受控部分的输出晶体管，以及差分放大器，包括耦合到输出端子的反馈输入端，接收参考电压的参考输入端，连接到控制器 输出晶体管的端子和连接到尾部电流源的一对输入晶体管。 第一晶体管的控制端子连接到参考输入端。 第二晶体管的控制端连接到反馈输入端。 第一电容元件耦合在输出端和一对的输入晶体管与它们的尾电流源的公共连接之间。 第二电容元件耦合在第二电源端子与一对的输入晶体管与它们的尾电流源的公共连接之间。

公开(公告)号：US11742803B2

公开(公告)日：2023-08-29

申请号：US17310333

申请日：2020-01-21

Applicant: ams AG

Inventor： Carlo Fiocchi ,  Andreas Fitzi ,  Andras Mozsary

IPC: H03F1/32 ,  H03F3/45

CPC classification number: H03F1/3211 ,  H03F3/45269 ,  H03F2200/294

Abstract: An amplifier circuit includes a circuit path of serially connected complementary type transistors. First and second feedback loops include a loop amplifier, the transistors of the circuit path and a corresponding resistor.

公开(公告)号：US11537155B2

公开(公告)日：2022-12-27

申请号：US16493039

申请日：2018-03-12

Applicant: ams AG

Inventor： Carlo Fiocchi ,  Valerio Pisati

IPC: G05F1/575 ,  G05F3/26 ,  G05F1/56

Abstract: A low-dropout regulator having an output current branch being arranged between a supply line to provide a supply potential and an output node to provide a regulated output voltage. The output current branch includes an output driver to provide an output current at the output node. The output driver has a control connection to apply a control voltage to operate the output driver with a different conductivity in dependence on the control voltage. The LDO includes an input amplifier stage to provide the control voltage to the control connection of the output driver. The input amplifier stage is configured to provide the control voltage with a different slew rate in dependence on an increase or decrease of the output current.

公开(公告)号：US11886215B2

公开(公告)日：2024-01-30

申请号：US17436677

申请日：2020-03-05

Applicant: ams AG

Inventor： Carlo Fiocchi

IPC: G05F1/575

CPC classification number: G05F1/575

Abstract: A voltage regulator comprises an output transistor with a controlled section connected between a first supply terminal and an output terminal. An amplifier comprises a reference input and a feedback input. A current mirror comprising a replica transistor. The current mirror is configured to mirror and attenuate a load current supplied by the output transistor to the replica transistor. A filter circuit is coupled to a controlled section of the replica transistor and coupled to the feedback input of the amplifier via the output terminal.

公开(公告)号：US20200012302A1

公开(公告)日：2020-01-09

申请号：US16493039

申请日：2018-03-12

Applicant: ams AG

Inventor： Carlo Fiocchi ,  Valerio Pisati

IPC: G05F1/575

Abstract: A low-dropout regulator comprises an output current branch (10) being arranged between a supply line (Vsupply) to provide a supply potential (VDD) and an output node (O) to provide a regulated output voltage (Vreg). The output current branch (10) comprises an output driver (20) to provide an output current (Iout) at the output node (O). The output driver (20) has a control connection (G20) to apply a control voltage (Vc) to operate the output driver (20) with a different conductivity in dependence on the control voltage (Vc). The LDO comprises an input amplifier stage (30) to provide the control voltage (Vc) to the control connection (G20) of the output driver (20). The input amplifier stage (30) is configured to provide the control voltage (Vc) with a different slew rate in dependence on an increase or decrease of the output current (Iout).

公开(公告)号：US10423177B2

公开(公告)日：2019-09-24

申请号：US16062599

申请日：2016-11-18

Applicant: ams AG

Inventor： Carlo Fiocchi ,  Monica Schipani

IPC: G05F1/575 ,  G05F1/46

Abstract: A level shift regulator circuit comprises a level shift transistor (Mls) and an output transistor (Mreg) being arranged in series to the level shift transistor (Mls) in an output path (OP). The circuit comprises a feedback path (FP) being arranged between an input node (IN) of the output path (OP) and a gate connection of the output transistor (Mreg). A current splitter (CS) is provided to split a current of a current source (IS0) coupled to the input node (IN) to reduce the loop gain. A current mirror (CM) is arranged in series to the current splitter (CS) to reduce the signal current provided by the current splitter (CS) to the gate connection of the output transistor (Mreg) to further reduce the gain and to improve stability of the circuit. A first and second filter (F1, F2) may optionally be provided to improve the phase response.

公开(公告)号：US09377801B2

公开(公告)日：2016-06-28

申请号：US14221184

申请日：2014-03-20

Applicant: ams AG

Inventor： Carlo Fiocchi ,  Alessandro Carbonini

IPC: G05F1/00 ,  H02H7/00 ,  H02H9/00 ,  G05F1/575 ,  H03H7/06

CPC classification number: G05F1/575 ,  H03H7/06

Abstract: In one embodiment a low-dropout regulator comprises a first differential amplifier (Nmos1) to receive an input voltage (Vin), a power transistor (T1) coupled to the first differential input pair (Nmos1), the power transistor having an output (OUT) forming an output terminal of the low-dropout regulator to provide an output voltage (Vout) as a function of the input voltage (Vin), a second differential amplifier (Pmos1) coupled to the first differential amplifier (Nmos1), and a switching element (Mncut1, Mncut2) coupled between first and second differential amplifier (Nmos1, Pmos1), said switching element (Mncut1, Mncut2) being operated as a function of a feedback signal (Sfb) derived from the output voltage (Vout). The second differential amplifier (Pmos1) is complementary to the first differential amplifier (Nmos1). The low-dropout regulator is operated in one of two modes such that in a first mode the second differential amplifier (Pmos1) is enabled and in the second mode the first differential amplifier (Nmos1) is enabled and the second differential amplifier (Pmos1) is disabled by means of the switching element (Mncut1, Mncut2).

Abstract translation: 在一个实施例中，低压差调节器包括用于接收输入电压（Vin）的第一差分放大器（Nmos1），耦合到第一差分输入对（Nmos1）的功率晶体管（T1），功率晶体管具有输出 ）形成所述低压差稳压器的输出端，以提供作为输入电压（Vin）的函数的输出电压（Vout）;耦合到所述第一差分放大器（Nmos1）的第二差分放大器（Pmos1） 耦合在第一和第二差分放大器（Nmos1，Pmos1）之间的元件（Mncut1，Mncut2），所述开关元件（Mncut1，Mncut2）作为从输出电压（Vout）导出的反馈信号（Sfb）的函数来操作。 第二个差分放大器（Pmos1）与第一个差分放大器（Nmos1）互补。 低压差稳压器以两种模式之一工作，使得在第一模式中第二差分放大器（Pmos1）被使能，而在第二模式中，第一差分放大器（Nmos1）被使能，第二差分放大器（Pmos1）是 通过开关元件（Mncut1，Mncut2）禁用。