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公开(公告)号：US11081160B2
公开(公告)日：2021-08-03
申请号：US16783063
申请日：2020-02-05
发明人： Yutaka Ito , Yuan He
IPC分类号： G11C8/00 , G11C11/406 , G11C11/408 , G11C11/4076
摘要： Apparatuses and methods for triggering row hammer address sampling are described. An example apparatus includes an oscillator circuit configured to provide a clock signal, and a filter circuit. The filter circuit includes a control circuit configured to receive pulses of the clock signal and provide an output signal that represents a count number by counting a number of pulses of the clock signal and control a probability of enabling the output signal based on the count number. The filter circuit further includes a logic gate configured to pass one of the pulses of the clock signal responsive to the output signal from the control circuit being enabled and filter another of the pulses responsive to the output signal from the control circuit being not enabled.
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公开(公告)号：US20200176050A1
公开(公告)日：2020-06-04
申请号：US16783063
申请日：2020-02-05
发明人： Yutaka Ito , Yuan He
IPC分类号： G11C11/406 , G11C11/408 , G11C11/4076
摘要： Apparatuses and methods for triggering row hammer address sampling are described. An example apparatus includes an oscillator circuit configured to provide a clock signal, and a filter circuit. The filter circuit includes a control circuit configured to receive pulses of the clock signal and provide an output signal that represents a count number by counting a number of pulses of the clock signal and control a probability of enabling the output signal based on the count number. The filter circuit further includes a logic gate configured to pass one of the pulses of the clock signal responsive to the output signal from the control circuit being enabled and filter another of the pulses responsive to the output signal from the control circuit being not enabled
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