公开(公告)号：US20130262911A1

公开(公告)日：2013-10-03

申请号：US13852595

申请日：2013-03-28

申请人： dSPACE digital signal processing and control engineering GmbH

发明人： Ralf Grosse BOERGER ,  Marco SCHMIDT

IPC分类号： G06F1/14

CPC分类号： G06F1/14 ,  G06F1/12 ,  G06F9/4887

摘要： A method for providing a timestamp in a real-time system, whereby the real-time system has an FPGA and a CPU, which cooperate with one another, and at least one register, which contains a system time, is implemented in the FPGA. The method includes the steps of providing a CPU counter for the system time, which is driven by a clock signal of the CPU, providing a synchronization counter in the CPU, whereby the synchronization counter is driven by a clock signal of the CPU, reading of the counter for providing the system time by a real-time application, querying the synchronization counter in the real-time application, and synchronizing the counter with the system time in the real-time application, when the synchronization counter outputs a value that corresponds to more than a predefined time period since the last synchronization of the CPU counter with the system time.

摘要翻译： 一种用于在实时系统中提供时间戳的方法，其中实时系统具有彼此协作的FPGA和CPU，并且至少一个包含系统时间的寄存器在FPGA中实现。 该方法包括以下步骤：提供由CPU的时钟信号驱动的系统时间的CPU计数器，在CPU中提供同步计数器，由此同步计数器由CPU的时钟信号驱动，读取 用于通过实时应用提供系统时间的计数器，在实时应用中查询同步计数器，以及当计数器与实时应用中的系统时间同步时，当同步计数器输出对应于 超过了CPU计数器与系统时间的最后同步之间的预定义时间段。