公开(公告)号：US08081879B2

公开(公告)日：2011-12-20

申请号：US12353171

申请日：2009-01-13

申请人： Xiaoqiang Shou ,  Kevin Cheng ,  Ruai Yu

发明人： Xiaoqiang Shou ,  Kevin Cheng ,  Ruai Yu

IPC分类号： H04B10/00

CPC分类号： H04B10/695

摘要： A transponder having a dynamic remapping circuit remaps a value of decision threshold voltage Vdtc and a value of optical power RXP to a reference voltage Vref to minimize the bit error rate BER of a communication system. The dynamic remapping circuit implements a bilinear mapping of Vdtc and RXP to Vref with three bilinear remapping constants “a”, “b”, and “c” selected to align a remapped value of Vdtc_opt to a selected Vdtc normalization value, Vdtc_norm. A transponder in accord with an embodiment of the invention prevents BER from exceeding a threshold value of BER whether RXP or OSNR, or both, remain constant, change continuously, or change intermittently. Constants “a”, “b”, and “c” are related to parameters resulting from mathematically fitting a line to data comprising Vdtc_opt versus RXP. Another embodiment comprises a method for dynamically optimizing Vdtc and RXP to Vref in a transponder with a bilinear remapping circuit.

摘要翻译： 具有动态重映射电路的应答器将判定阈值电压Vdtc的值和光功率值RXP重新映射到参考电压Vref，以最小化通信系统的误码率BER。 动态重映射电路实现Vdtc和RXP到Vref的双线性映射，具有三个双线性重映射常数“a”，“b”和“c”，用于将Vdtc_opt的重映射值与所选择的Vdtc归一化值Vdtc_norm对准。 根据本发明的实施例的应答器防止BER超过BER的阈值，无论RXP还是OSNR或两者都保持不变，连续变化或间歇性地改变。 常数“a”，“b”和“c”与通过数学拟合一行到Vdtc_opt与RXP的数据相关的参数相关。 另一个实施例包括一种用于在具有双线性重映射电路的转发器中动态优化Vdtc和RXP至Vref的方法。

公开(公告)号：US08280260B2

公开(公告)日：2012-10-02

申请号：US13332224

申请日：2011-12-20

申请人： Xiaoqiang Shou ,  Kevin Cheng ,  Ruai Yu

发明人： Xiaoqiang Shou ,  Kevin Cheng ,  Ruai Yu

IPC分类号： H04B10/00

CPC分类号： H04B10/695

摘要： A transponder having a dynamic remapping circuit remaps a value of decision threshold voltage Vdtc and a value of optical power RXP to a reference voltage Vref to minimize the bit error rate BER of a communication system. The dynamic remapping circuit implements a bilinear mapping of Vdtc and RXP to Vref with three bilinear remapping constants “a”, “b”, and “c” selected to align a remapped value of Vdtc_opt to a selected Vdtc normalization value, Vdtc_norm. A transponder in accord with an embodiment of the invention prevents BER from exceeding a threshold value of BER whether RXP or OSNR, or both, remain constant, change continuously, or change intermittently. Constants “a”, “b”, and “c” are related to parameters resulting from mathematically fitting a line to data comprising Vdtc_opt versus RXP. Another embodiment comprises a method for dynamically optimizing Vdtc and RXP to Vref in a transponder with a bilinear remapping circuit.

摘要翻译： 具有动态重映射电路的应答器将判定阈值电压Vdtc的值和光功率值RXP重新映射到参考电压Vref，以最小化通信系统的误码率BER。 动态重映射电路实现Vdtc和RXP到Vref的双线性映射，其中三个双线性重映射常数a，b和c被选择以将Vdtc_opt的重新映射的值对准所选择的Vdtc归一化值Vdtc_norm。 根据本发明的实施例的应答器防止BER超过BER的阈值，无论RXP还是OSNR或两者都保持不变，连续变化或间歇性地改变。 常数a，b和c与通过数学拟合一行到Vdtc_opt与RXP的数据相关的参数相关。 另一个实施例包括一种用于在具有双线性重映射电路的转发器中动态优化Vdtc和RXP至Vref的方法。

公开(公告)号：US08145059B2

公开(公告)日：2012-03-27

申请号：US12074239

申请日：2008-02-28

申请人： Ruai Yu

发明人： Ruai Yu

IPC分类号： H04B10/00

CPC分类号： H04B10/40

摘要： A topology for optical transceiver components comprises an electrical signal interface stage, a data timing and signal reformatting stage, and an optical fiber interface stage. Unlike transceiver components known in the art, functions having signals with the most jitter are partitioned into the electrical signal interface stage. Data timing functions, for example retiming or clock and data recovery, are included in the data timing and reformatting stage. Output jitter from the data timing and signal reformatting stage is approximately equal to jitter in a clock signal, enabling use of semiconductor components having jitter greater than SONET limits and thereby increasing a value of production yield. Embodiments of the invention are well suited for 40 G transmitters and receivers in nonconnectorized surface mount packages. 40 G transceivers built in accord with the invention are expected to have lower cost, smaller size, and higher production yield than 40 G transceivers known in the art.

摘要翻译： 用于光收发器组件的拓扑包括电信号接口级，数据定时和信号重新格式化级以及光纤接口级。 与本领域已知的收发器组件不同，具有最大抖动的信号的功能被划分为电信号接口级。 数据定时功能，例如重新定时或时钟和数据恢复被包括在数据定时和重新格式化阶段。 来自数据定时和信号重新格式化阶段的输出抖动近似等于时钟信号中的抖动，从而能够使用抖动大于SONET限制的半导体元件，从而提高产量。 本发明的实施例非常适用于非连接的表面贴装封装中的40G发射器和接收器。 根据本发明构建的40G收发器预期具有比本领域已知的40G收发器更低的成本，更小的尺寸和更高的产量。