公开(公告)号：US5335077A

公开(公告)日：1994-08-02

申请号：US906267

申请日：1992-06-26

申请人： Shinichi Yamashita ,  Shingo Ikeda ,  Makoto Gohda

发明人： Shinichi Yamashita ,  Shingo Ikeda ,  Makoto Gohda

IPC分类号： H04N9/896 ,  A04N9/89

CPC分类号： H04N9/896

摘要： A time base correcting device inputs a video signal including a sync. signal and a burst signal, produces an error signal representing a phase difference between a clock signal synchronized with the sync. signal and the burst signal, writes the video signal into the memory in synchronism with the clock signal having a phase thereof adjusted in accordance with the error signal, produces an interpolation signal to interpolate a plurality of adjacent error signals along a time base and controls the readout from the memory by the error signals and the interpolation signal. In this manner, it attains time base correction, particularly velocity error correction with high accuracy.

摘要翻译： 时基校正装置输入包括同步的视频信号。 信号和突发信号产生表示与同步同步的时钟信号之间的相位差的误差信号。 信号和突发信号，将视频信号与具有根据误差信号调整的相位的时钟信号同步地写入存储器，产生内插信号，以沿着时基内插多个相邻的误差信号，并且控制 通过误差信号和插值信号从存储器读出。 以这种方式，可以实现时基校正，特别是高精度的速度误差校正。