公开(公告)号：US06404466B1

公开(公告)日：2002-06-11

申请号：US09556630

申请日：2000-04-21

申请人： Tae Miyahara

发明人： Tae Miyahara

IPC分类号： G02I11333

CPC分类号： G02F1/13624 ,  G02F1/136286

摘要： A thin film transistor array for improving writing characteristics into a pixel electrode without a decrease in aperture ratio is provided. A source electrode of a thin film transistor for writing and a source electrode of a thin film transistor for preliminary charging are electrically connected to a pixel electrode. A semiconductor pattern of the thin film transistor for preliminary charging is formed so as to cover a region of intersection of a scanning line 1a and a signal line and a part of a region of formation of a gate storage capacitance.

摘要翻译： 提供了一种薄膜晶体管阵列，用于提高像素电极的写入特性，而不会降低开口率。 用于写入的薄膜晶体管的源电极和用于预充电的薄膜晶体管的源电极电连接到像素电极。 形成用于预充电的薄膜晶体管的半导体图案，以覆盖扫描线1a和信号线的交叉区域以及栅极存储电容的形成区域的一部分。