Switched capacitor integrator having very low power and low distortion and noise
    1.
    发明授权
    Switched capacitor integrator having very low power and low distortion and noise 失效
    开关电容积分器功耗非常低,失真和噪声低

    公开(公告)号:US06614285B2

    公开(公告)日:2003-09-02

    申请号:US09054521

    申请日:1998-04-03

    IPC分类号: G06G7186

    CPC分类号: G06G7/1865

    摘要: Power available to an integrator circuit is controlled so that relatively high power is provided during one phase of operation, such as during an interval when slewing in a device is expected and relatively low power is provided during another phase. In one implementation, increased power is provided by switching in parallel current mirrors when power demands are expected to be high, whether or not high power is actually needed in a particular interval. The techniques are particularly useful when applied to clocked integrator circuits.

    摘要翻译: 对集成电路可用的功率进行控制,使得在一个操作阶段期间提供相对较高的功率,例如在期望设备中回转的间隔期间,并且在另一阶段期间提供相对较低的功率。 在一个实施方式中,当功率需求预期为高时,无论在特定间隔中是否实际需要高功率,通过切换并联电流镜来提供功率增加。 当应用于时钟积分器电路时,这些技术特别有用。