公开(公告)号：US07408206B2

公开(公告)日：2008-08-05

申请号：US11164377

申请日：2005-11-21

申请人： Kenneth L. DeVries ,  Nancy Anne Greco ,  Joan Preston ,  Stephen Larry Runyon

发明人： Kenneth L. DeVries ,  Nancy Anne Greco ,  Joan Preston ,  Stephen Larry Runyon

IPC分类号： H01L29/017

CPC分类号： H01L23/5226 ,  H01L21/743 ,  H01L23/5286 ,  H01L23/585 ,  H01L23/60 ,  H01L2924/0002 ,  H01L2924/00

摘要： Methods and structures and methods of designing structures for charge dissipation in an integrated circuit on an SOI substrate. A first structure includes a charge dissipation ring around a periphery of the integrated circuit chip and one or more charge dissipation pedestals physically and electrically connected to the charge dissipation pedestals. The silicon layer and bulk silicon layer of the SOI substrate are connected by the guard ring and the charge dissipation pedestals. The ground distribution grid of the integrated circuit chip is connected to an uppermost wire segment of one or more charge dissipation pedestals. A second structure, replaces the charge dissipation guard ring with additional charge dissipation pedestal elements.

摘要翻译： 在SOI衬底上集成电路中设计电荷耗散结构的方法和结构及方法。 第一结构包括围绕集成电路芯片的周边的电荷耗散环以及物理和电连接到电荷消耗基座的一个或多个电荷消耗基座。 SOI衬底的硅层和体硅层通过保护环和电荷消耗基座连接。 集成电路芯片的地面配电网连接到一个或多个电荷消耗基座的最上面的线段。 第二种结构，用额外的电荷消耗基座元件代替电荷消除保护环。