公开(公告)号：WO2004092875A2

公开(公告)日：2004-10-28

申请号：PCT/US2004010731

申请日：2004-04-08

Applicant: NEWISYS INC ,  ZEITLER CARL ,  GLASCO DAVID B ,  KOTA RAJESH ,  PRASADH GURU ,  OEHLER RICHARD R ,  EDRICH DAVID S

Inventor： ZEITLER CARL ,  GLASCO DAVID B ,  KOTA RAJESH ,  PRASADH GURU ,  OEHLER RICHARD R ,  EDRICH DAVID S

IPC: G06F20060101 ,  G06F13/00 ,  H04L29/06 ,  G06F

CPC classification number: G06F12/0815 ,  G06F12/0817 ,  H04L69/12

Abstract: A computer system is described having a plurality of processing nodes interconnected by a first point-to-point architecture, and a system memory including a plurality of portions each of which is associated with one of the processing nodes. Each processing node includes a processor, and a memory controller for controlling acc4ess to the associated portion of the system memory, and may contain a host bridge for facilitating communication with a plurality of I/O devices. The first point-to-point architecture is operable to facilitate first transactions between the processors and the system memory. The computer system further includes at least one I/O controller and a second point-to-point architecture independent of the first point-to-point architecture and interconnecting the I/O controller and the host bridges. The at least one I/O controller is operable to facilitate second transactions between the I/O devices and the system memory via the second point-to-point architecture.

Abstract translation: 描述了具有通过第一点对点架构互连的多个处理节点的计算机系统，以及包括多个部分的系统存储器，每个部分与处理节点中的一个相关联。 每个处理节点包括处理器和存储器控制器，用于控制系统存储器的相关部分的可靠性，并且可以包含用于促进与多个I / O设备的通信的主机桥。 第一点对点架构可操作以便于处理器和系统存储器之间的第一次交易。 计算机系统还包括独立于第一点对点架构并互连I / O控制器和主机桥的至少一个I / O控制器和第二点对点架构。 所述至少一个I / O控制器可操作以经由第二点对点架构促进I / O设备和系统存储器之间的第二事务。