Abstract:
An image sensor that has a plurality of pixels within a pixel array coupled to a control circuit and to one or more subtraction circuits. The control circuit may cause an output transistor coupled to a pixel to provide a first reference output signal, a common reset output signal, and a first sense-node reset output signal, between which a subtraction circuit may form a weighted difference to create a noise signal. The control circuit may cause the output transistor to provide a second sense-node reset output signal, a light response output signal and a second reference output signal, between which a subtraction circuit may form a weighted difference to create a normalized light response signal. The light response output signal corresponds to the image that is to be captured by the sensor. The noise signal may be subtracted from the normalized light response signal to generate a denoised signal.
Abstract:
Image data is processed to facilitate focusing and/or optical correction. According to an example embodiment of the present invention, an imaging arrangement (190) collects light data corresponding to light passing through a particular focal plane. The light data is collected using an approach that facilitates the determination of the direction from which various portions of the light incident upon a portion of the focal plane emanate from. Using this directional information in connection with value of the light as detected by photosensors (130) , an image represented by the light is selectively focused and/or corrected.
Abstract:
Image data is processed to facilitate focusing and/or optical correction. According to an example embodiment of the present invention, an imaging arrangement collects light data corresponding to light passing through a particular focal plane. The light data is collected using an approach that facilitates the determination of the direction from which various portions of the light incident upon a portion of the focal plane emanate from. Using this directional information in connection with value of the light as detected by photo sensors, an image represented by the light is selectively focused and/or corrected.
Abstract:
Unwanted artifacts can occur in the output of a linear CCD sensor, caused by switching the exposure gate control voltage from a high level to a low level to begin exposure while the device is reading out. A novel gate driver circuit for driving a lateral overflow gate of the CCD sensor provides a constant current path between the gate electrode and a low potential source. When a connection to a high potential source is opened to begin exposure, energy stored in a capacitance associated with the gate flows through the constant current path. This causes the gate voltage (30A) to move slowly and smoothly to the low potential and thus eliminates the unwanted artifacts.
Abstract:
A five stage background filter circuit (10) which is capable of responding to background radiation changes at speeds which are from one to two orders of magnitude faster than conventional prior filter. The invention utilizes a cross can multiplexing technique in combination with filter circuitry depicted in schematic over view in (Fig. 1). Circuit (10) includes a differential amplifier (12), a sample and hold device (14), a responsivity corrector (16), a recursive filter (18), and a background subtractor (20). Output signals (11) from a focal plane array of detectors (Fig. 3) are passed through impedance matching input resistors (12a, b) to an amplifier. A sample and hold circuit (14a) cyclically selects and stores a signal received from first stage (12). The detector outputs are then normalized by responsivity corrector stage (16) which employs a digital-to-analog converter (16a) and random access memory (16c). A threshold band comparison and time-out logic circuit (21) within background subtractor stage (20) controls the operation of recursive filter stage (18) in order to suppress signals due to sensed radiation bursts and to eliminate the unwanted, dynamically varying background radiation portion of the signal present at node (17b). A processed output signal present at node (20i) is then passed to a target detection processor.