Abstract:
Techniques for conserving power by controlling program execution in a convergence device comprising a battery or other power source and at least one processor. The processor is configured to perform processing operations associated with voice call communication functions and to perform processing operations associated with data communication functions, and is operative to execute critical programs and noncritical programs. The convergence device stores, for at least a given one of a plurality of noncritical programs associated with the data communication functions, an identifier of at least one alternate capacity program capable of performing substantially the same function as the given program but having a different power source capacity associated therewith. Based at least in part on a power indicator representative of remaining capacity or another characteristic of the power source, execution of the given program may be replaced with execution of the alternate capacity program, such that an amount of power source capacity utilizable for the voice call communication functions is increased.
Abstract:
A system that allows mobile terminals to periodically remove power from at least some components is disclosed. The mobile terminal receives bursts of content. Some of the bursts of content includes relative time information identifying the transmission time of a subsequent burst of content. The mobile terminal may remove power from a receiving module during times when the mobile terminal is not scheduled to receive content bursts.
Abstract:
A method is provided for reducing the power consumption of a microprocessor system that comprises of a microprocessor and a memory connected by at least one bus. The method includes: determining the frequency with which each control code occurs, or is likely to occur, adjacent to each of the other control codes in consecutive instructions of a program, and based on the frequencies so determined, assigning a bit pattern to each control code which minimises the average Hamming distance between consecutive instructions when the program is run.
Abstract:
The invention uses a general-purpose computer with a processor capable of operating at a plurality of performance levels, and has an operating system with the capability to set a plurality of task priority levels for task performed on the computer. The method reads a task's priority level, associates the task's priority level with a performance level, and sets the processor to operate at the performance level.
Abstract:
The present invention provides a digital-based mechanism for adjusting the power consumption in a processor. The processor includes one or more functional units and a digital throttle that monitors activity states of the processor's functional units to estimate the processor's power consumption. One embodiment of the digital throttle includes one or more gate units, a monitor circuit (320), and a throttle circuit (330). Each gate unit controls the delivery of power delivery to a functional unit of the processor and provides a signal that indicates the activity state of its associated functional unit. The monitor circuit determines an estimated power consumption level from the signals and compares the estimated power consumption with a threshold power level. The throttle circuit adjusts the instruction flow in the processor if the estimated power consumption exceeds the threshold power level.
Abstract:
A method and apparatus for power mode transition in a multi-thread processor (200). A first indication is issued, including a first identifier associated with a first logical processor (210) in a processor, that the first logical processor has entered a power mode. A second indication is issued, including a second identifier associated with a second logical processor (220) in the processor, that the second logical processor has entered the power mode. The indications may be, for example, stop grant acknowledge special bus cycles indicating that the logical processors have entered a stop grant mode. The processor may be transitioned to a sleep mode when both the first and second indications have been issued.
Abstract:
A first quality of service identifier is assigned to each subtask associated with each node of a compute workflow, the first quality of service identifier indicative of a level of quality of service associated with each node. A planned resource requirement is assigned to each subtask, the planned resource requirement indicative of a total amount of system resources required to complete each subtask. A resource allocation plan is generated for each subtask, the resource allocation plan indicative of a distribution of the system resources over time in at least one resource manager. The resource allocation plan and the first quality of service identifier are output to the at least one resource manager for enforcement of the level of quality of service on one or more jobs submitted for each node through at least one workflow orchestrator external to the at least one resource manager.
Abstract:
Various embodiments of methods and systems for closed loop multimode sleep clock frequency compensation in a portable computing device are disclosed. An exemplary embodiment leverages a modem to determine a frequency shift on a sleep clock signal when a reference clock has transitioned into a power saving mode. Using the frequency shift calculation, a compensation capacitor may be adjusted to deliver a more optimum dummy load on the crystal oscillator when the reference clock is taken offline. The method may iterate through until the actual frequency shift of the sleep clock is within an acceptable tolerance relative to zero and, further, may also set a status bit to indicate that the sleep clock frequency is stable.