公开(公告)号：WO99037039A2

公开(公告)日：1999-07-22

申请号：PCT/US1999/000936

申请日：1999-01-15

IPC: G01R33/02 ,  H02J7/00 ,  H02M7/219 ,  H04B5/02 ,  H04B5/00

CPC classification number: H02M7/219 ,  H02M2007/2195 ,  Y02B70/1408

Abstract: The highly efficient multi-frequency voltage regulating circuit is capable of converting magnetic field energy to electrical energy for charging either a battery or an energy storage device such as a capacitor. The invention provides a magnetic field sensor circuit that measures the strength of incoming magnetic field energy with respect to a reference current. The invention also provides for a programmable magnetic field detection circuit which is used to adjust the detection level of the inductor-capacitor magnetic field converter circuit. A discharge expediter circuit is provided to improve the efficiency of the magnetic field converter circuit by discharging excess energy.

Abstract translation: 高效率的多频电压调节电路能够将磁场能量转换成用于对诸如电容器的电池或能量存储装置充电的电能。 本发明提供一种磁场传感器电路，其测量相对于参考电流的输入磁场能量的强度。 本发明还提供一种可编程磁场检测电路，用于调节电感器 - 电容器磁场转换器电路的检测电平。 提供放电加速器电路以通过放出多余的能量来提高磁场转换器电路的效率。

公开(公告)号：WO1996028879A1

公开(公告)日：1996-09-19

申请号：PCT/GB1996000620

申请日：1996-03-15

Applicant: BRITISH TECHNOLOGY GROUP INTER-CORPORATE LICENSING LTD. ,  SCHEELEN, Jos

Inventor： BRITISH TECHNOLOGY GROUP INTER-CORPORATE LICENSING LTD.

IPC: H02M07/219

CPC classification number: G06K19/0701 ,  G01S13/751 ,  G01S13/758 ,  G06K19/0723 ,  H02M7/219 ,  H02M2007/2195 ,  Y02B70/1408

Abstract: An integrated circuit full-wave rectifier which can be implemented in CMOS technology comprises a first pair of N channel transistors (104, 106) arranged to switch on opposing half cycles of an a.c. input signal and having their gates connected to receive opposing half cycles; and a second pair of N channel transistors (102, 108) also arranged to switch on opposing half cycles and being connected in common drain mode. The circuit may also be provided with a voltage limiter circuit comprising a third pair (112, 114) and a fourth pair (118, 120) of N channel transistors arranged to operate on opposing half cycles, a first transistor (114, 120) of each pair being connected in common drain mode and the gates of the other transistor (112, 118) of each pair being supplied from a P channel transistor (110), the P channel transistor having its gate supplied with a reference voltage.

Abstract translation: 可以在CMOS技术中实现的集成电路全波整流器包括：第一对N沟道晶体管（104,106），被布置为开关相对的一个a.c.的相对的半周期。 输入信号并使其门连接以接收相对的半周期; 以及第二对N沟道晶体管（102,108），其还被布置为在相对的半周期上接通并以共同漏极模式连接。 电路还可以设置有限压器电路，该电压限制器电路包括被配置为在相对的半周期上操作的N沟道晶体管的第三对（112,114）和第四对（118,120），第一晶体管（114,120） 每对都以公共漏极模式连接，并且每对的另一晶体管（112,118）的栅极由P沟道晶体管（110）提供，所述P沟道晶体管的栅极被提供参考电压。